ADV7177KSZ-REEL Analog Devices Inc, ADV7177KSZ-REEL Datasheet
ADV7177KSZ-REEL
Specifications of ADV7177KSZ-REEL
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ADV7177KSZ-REEL Summary of contents
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FEATURES ITU-R BT601/656 YCrCb to PAL/NTSC video encoder High quality, 9-bit video DACs Integral nonlinearity <1 LSB at 9 bits NTSC-M, PAL-M/N, PAL-B/D/G/H/I Single 27 MHz crystal/clock required (±2 oversampling video SNR 32-bit direct digital synthesizer for color ...
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ADV7177/ADV7178 TABLE OF CONTENTS General Description ......................................................................... 4 Specifications..................................................................................... Specifications ......................................................................... 5 3.3 V Specifications ...................................................................... Dynamic Specifications........................................................ 7 3.3 V Dynamic Specifications..................................................... Timing Specifications ........................................................... 9 3.3 V Timing Specifications ...
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REVISION HISTORY 3/05—Rev Rev. C Updated Format.................................................................. Universal Changes to Figure 6.........................................................................13 Changes to Subcarrier Frequency Register 3–0 Section ............28 Changes to Register Values Section ..............................................40 Updated Outline Dimensions........................................................43 Changes to Ordering Guide...........................................................43 3/02—Rev Rev. B ...
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ADV7177/ADV7178 GENERAL DESCRIPTION The ADV7177/AD7178 are integrated digital video encoders that convert digital CCIR-601 4:2 16-component video data into a standard analog baseband television signal compatible with worldwide standards. The 4:2:2 YUV video data is interpolated to 2× ...
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SPECIFICATIONS 5 V SPECIFICATIONS ± 5 1.235 300 Ω. All specifications T AA REF SET Table 1. Parameter 3 STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential ...
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ADV7177/ADV7178 3.3 V SPECIFICATIONS 3 3 1.235 REF SET Table 2. Parameter Conditions 3 STATIC PERFORMANCE Resolution (Each DAC) Accuracy (Each DAC) Integral Nonlinearity Differential Nonlinearity Guaranteed monotonic ...
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V DYNAMIC SPECIFICATIONS 4. 5. 1.235 REF Table 3. Parameter FILTER CHARACTERISTICS 3 Luma Bandwidth (Low-Pass Filter) Stop-Band Cutoff Pass-Band Cutoff Chroma Bandwidth Stop-Band Cutoff ...
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ADV7177/ADV7178 3.3 V DYNAMIC SPECIFICATIONS 3 3 1.235 REF SET Table 4. Parameter FILTER CHARACTERISTICS 3 Luma Bandwidth (Low-Pass Filter) Stop-Band Cutoff Pass-Band Cutoff Chroma Bandwidth ...
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V TIMING SPECIFICATIONS 4. 5. 1.235 REF Table 5. Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulse Width SCLOCK Low Pulse Width ...
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ADV7177/ADV7178 3.3 V TIMING SPECIFICATIONS 3.0 V–3 1.235 REF SET Table 6. Parameter 3, 4 MPU PORT SCLOCK Frequency SCLOCK High Pulse Width SCLOCK Low Pulse Width ...
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SDATA t 6 SCLOCK t 2 Figure 2. MPU Port Timing Diagram CLOCK HSYNC, CONTROL FIELD/VSYNC, I/PS BLANK PIXEL INPUT Cb Y DATA HSYNC, CONTROL FIELD/VSYNC, O/PS BLANK Figure 3. Pixel and Control Data ...
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ADV7177/ADV7178 ABSOLUTE MAXIMUM RATINGS STRESS RATINGS Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 9. Pin Function Descriptions Pin No. Mnemonic I/O Function 1, 20, 28 Power Supply CLOCK/2 O Synchronous Clock Output Signal. Can be either 27 MHz or 13.5 MHz; this ...
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ADV7177/ADV7178 TYPICAL PERFORMANCE CHARACTERISTICS 0 –10 TYPE A –20 –30 –40 –50 – FREQUENCY (MHz) Figure 7. NTSC Low-Pass Filter 0 –10 –20 –30 –40 –50 – FREQUENCY (MHz) Figure ...
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FREQUENCY (MHz) Figure 13 . PAL UV Filter 12 Rev Page ADV7177/ADV7178 ...
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ADV7177/ADV7178 THEORY OF OPERATION DATA PATH DESCRIPTION For PAL and NTSC M, N modes, YCrCb 4:2:2 data is input via the CCIR-656-compatible pixel port MHz data rate. The pixel data ...
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VIDEO TIMING DESCRIPTION The ADV7177/ADV7178 are intended to interface to off-the- shelf MPEG1 and MPEG2 decoders. Consequently, the ADV7177/ADV7178 accept 4:2:2 YCrCb pixel data via a CCIR-656 pixel port, and have several video timing modes allowing them to be configured ...
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ADV7177/ADV7178 TIMING AND CONTROL Mode 0 (CCIR-656): Slave Option Timing Register 0 TR0 = The ADV7177/ADV7178 are controlled by the start active video (SAV) and end active video (EAV) time codes in ...
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DISPLAY 622 623 624 625 EVEN FIELD ODD FIELD DISPLAY 309 310 311 312 313 ODD FIELD EVEN FIELD ANALOG VIDEO Figure 17. Timing Mode 0 Data Transitions (Master Mode) ...
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ADV7177/ADV7178 Mode 1: Slave Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accepts horizontal SYNC and odd/even FIELD signals. A transition of the FIELD ...
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Mode 1: Master Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 can generate horizontal SYNC and odd/even FIELD signals. A transition of the FIELD ...
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ADV7177/ADV7178 Mode 2: Slave Option HSYNC , VSYNC , BLANK Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accept horizontal and vertical SYNC signals. A coincident low transition of both ...
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Mode 2: Master Option HSYNC , VSYNC , BLANK Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 can generate horizontal and vertical SYNC signals. A coincident low transition of both ...
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ADV7177/ADV7178 Mode 3: Master/Slave Option HSYNC , BLANK , FIELD Timing Register 0 TR0 = this mode, the ADV7177/ADV7178 accept or generate ...
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POWER-ON RESET After power-up necessary to execute a reset operation. A reset occurs on the falling edge of a high-to-low transition on the RESET pin. This initializes the pixel port so that the pixel inputs P0, ...
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ADV7177/ADV7178 Stop and start conditions can be detected at any stage during the data transfer. If these conditions are asserted out of sequence with normal read and write operations, they cause an immediate jump to the idle condition. During a ...
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REGISTERS REGISTER ACCESS The MPU can write to or read from all of the ADV7177 and ADV7178 registers except the subaddress register, which is a write-only register. The subaddress register determines which register the next read or write operation accesses. ...
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ADV7177/ADV7178 MR07 OUTPUT SELECT MR06 0 YC OUTPUT 1 RGB/YUV OUTPUT MR07 ZERO SHOULD BE WRITTEN TO THIS BIT MR17 ONE SHOULD BE WRITTEN TO COLOR BAR CONTROL MR17 0 DISABLE 1 ENABLE Output Select (MR06) This bit specifies if ...
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Program as FSC Register 0: 1Fh FSC Register 2: 7Ch FSC Register 3: F0h FSC Register 4: 21h Figure 34 shows how the frequency is set up by the four registers. SUBCARRIER FSC31 FSC30 FSC29 FSC28 FSC27 FREQUENCY REG 3 ...
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ADV7177/ADV7178 TIMING REGISTER 1 (TR17–TR10) Address [SR4–SR0] = 0CH Timing Register 8-bit-wide register. Figure 38 shows the various operations under the control of Timing Register 1. This register can be read from as well as written to. ...
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MR2 BIT DESCRIPTION Square Pixel Control (MR20) This bit is used to set up square pixel mode. This is available in slave mode only. For NTSC, a 24.5454 MHz clock must be supplied. For PAL, a 29.5 MHz clock must ...
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ADV7177/ADV7178 OSD REGISTER 0–11 Address [SR4–SR0] = 13H–1EH There are 12 OSD registers as shown in Figure 42. There are four bits for each Y, Cb, and Cr value, and there are four zeros added to give the complete byte ...
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BOARD DESIGN AND LAYOUT CONSIDERATIONS The ADV7177/ADV7178 are highly integrated circuits containing both precision analog circuitry and high speed digital circuitry. The parts have been designed to minimize interference effects on the integrity of the analog circuitry by the high ...
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ADV7177/ADV7178 OSD INPUTS 3–10, 12–14 PIXEL DATA UNUSED 4kΩ INPUTS RESET SHOULD BE GROUNDED 100nF 27MHz 33pF XTAL 33pF 27MHz OR 13.5MHz CLOCK OUTPUT POWER SUPPLY DECOUPLING FOR EACH POWER SUPPLY GROUP 0.1µ ...
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CLOSED CAPTIONING The ADV7177/ADV7178 support closed captioning, which conforms to the standard television synchronizing waveform for color transmission. Closed captioning is transmitted during the blanked active line time of Line 21 of the odd fields and Line 284 of even ...
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ADV7177/ADV7178 WAVEFORM ILLUSTRATIONS NTSC WAVEFORMS WITH PEDESTAL 130.8 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 100 IRE 7.5 IRE 0 IRE –40 IRE 963.8mV 286mVp-p 650mV 335.2mV 0mV 100 IRE 7.5 IRE 0 IRE –40 IRE 714.2mV Figure ...
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NTSC WAVEFORMS WITHOUT PEDESTAL 130.8 IRE 100 IRE 0 IRE –40 IRE 100 IRE 0 IRE –40 IRE 286mVp-p 0mV 100 IRE 0 IRE –40 IRE 714.2mV BLANK/BLACK LEVEL Figure 49. NTSC Composite Video Levels 714.2mV BLANK/BLACK LEVEL Figure 50. ...
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ADV7177/ADV7178 PAL WAVEFORMS 1284.2mV 1047.1mV 350.7mV 50.8mV 1047mV 350.7mV 50.8mV 989.7mV 300mVp-p 650mV 317.7mV 0mV 1050.2mV 351.8mV 51mV 696.4mV Figure 53. PAL Composite Video Levels 696.4mV Figure 54. PAL Luma Video Levels 672mVp-p Figure 55. PAL Chroma Video Levels 698.4mV ...
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UV WAVEFORMS 334mV 171mV BETACAM LEVEL 0mV –171mV –334mV –505mV Figure 57. NTSC 100% Color Bars Without Pedestal, U Levels 309mV 158mV BETACAM LEVEL 0mV –158mV –309mV –467mV Figure 58. NTSC 100% Color Bars With Pedestal, U Levels 232mV 118mV ...
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ADV7177/ADV7178 REGISTER VALUES The ADV7177/ADV7178 registers can be set depending on the user standard required. The following examples give the various register formats for several video standards. In each case the output is set to com- posite output with all ...
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OPTIONAL OUTPUT FILTER If an output filter is required for the CVBS, Y, UV, Chroma, and RGB outputs of the ADV7177/ADV7178, the filter in Figure 63 can be used. Plots of the filter characteristics are shown in Figure 64. An ...
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ADV7177/ADV7178 OPTIONAL DAC BUFFERING For external buffering of the ADV7177/ADV7178 DAC outputs, the configuration in Figure 65 is recommended. This configuration shows the DAC outputs running at half (18 mA) their full-current (34.7 mA) capability. This allows the devices to ...
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... MIN VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range ADV7177KS 0°C to 70°C ADV7177KS-REEL 0°C to 70°C 1 ADV7177KSZ 0°C to 70°C ADV7177KSZ-REEL 1 0°C to 70°C ADV7178KS 0°C to 70°C ADV7178KS-REEL 0°C to 70° Pb-free part. 1.03 2.45 MAX 0.88 ...
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ADV7177/ADV7178 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C00228–0-3/05(C) Rev Page ...