ADUC7033BSTZ-88-RL Analog Devices Inc, ADUC7033BSTZ-88-RL Datasheet - Page 106

• Manufacturer Part Number: ADUC7033BSTZ-88-RL
• Description: Flash 96k ARM7 Dual 16-Bit ADC LIN I.C.
• Manufacturer: Analog Devices Inc
• Type: Battery Managementr

Specifications of ADUC7033BSTZ-88-RL

• Input Type: Logic
• Output Type: Logic
• Interface: UART, SPI
• Current - Supply: 20mA
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7033
WAKE-UP (WU) PIN
The wake-up (WU) pin is a high voltage GPIO controlled
through HVCON and HVDAT.
WU Pin Circuit Description
The WU pin is configured by default as an output with an
internal 10 kΩ pull-down resistor and high-side FET driver.
The WU pin, in its default mode of operation, is specified to
generate an active high system wake-up request by forcing the
external system WU bus high. User code can assert the WU
output by writing directly to HVCFG0[4].
Note that the output responds only after the 10 μs latency
through the (serial communication based) high voltage
interface.
The internal FET is capable of sourcing significant current and,
therefore, substantial on-chip self-heating can occur if this
driver is asserted for a long time period. For this reason, a
monoflop (a 1.3-second timeout timer) is included.
OUTPUT CONTROL
SHORT-CIRCUIT
PROTECTION
HVCFG0[4]
HVMON[0]
HVMON[7]
NORMAL
NORMAL
IMMUNITY
GLITCH
400µs
READBACK
HVCFG1[4]
ENABLE
SHORT-CIRCUIT
TRIP REFERENCE
3V
Figure 41. WU Circuit, Block Diagram
Rev. B | Page 106 of 140
6.6kΩ
3.3kΩ
IO_VSS
R1
R2
VDD
INTERNAL
SENSE
RESISTOR
6kΩ
INTERNAL
10kΩ
RESISTOR
By default, the monoflop is enabled and disables the wake-up
driver after 1.3 seconds. It is possible to disable the monoflop
through HVCFG1[1]. If the wake-up monoflop is disabled, then
the wake-up driver should be disabled after 1.3 seconds.
The WU pin also features a short-circuit detection feature.
When the wake-up pin sources more than 100 mA typically for
400 μs, a high voltage interrupt is generated with HVMON[0] set.
A thermal shutdown event disables the WU driver. The WU
driver must be re-enabled manually after a thermal event using
HVCFG1[3]. It is possible to disable the automatic shutdown
during a thermal event via HVCFG0[7].
The WU pin can be configured in I/O mode by writing a 1 to
HVCFG1[4]. In this mode, a rising or falling edge immediately
generates a high voltage interrupt. HVMON[7] directly reflects
the state of the external WU pin. This comparator has a trip
level of 3 V
O/C
DIAGNOSTIC
RESISTOR
HVCFG1[0]
TYP
.
EXTERNAL
WU PIN
CURRENT-LIMIT
EXTERNAL
RESISTOR
39Ω
C
91nF
LOAD
R
1kΩ
LOAD
EXTERNAL
WAKE BUS