ADN2525ACPZ-REEL7 Analog Devices Inc, ADN2525ACPZ-REEL7 Datasheet - Page 12

IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC

ADN2525ACPZ-REEL7

Manufacturer Part Number
ADN2525ACPZ-REEL7
Description
IC,Laser Diode/LED Driver,LLCC,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Type
Laser Diode Driver (Fiber Optic)r
Datasheet

Specifications of ADN2525ACPZ-REEL7

Data Rate
10.7Gbps
Number Of Channels
1
Voltage - Supply
3.07 V ~ 3.53 V
Current - Supply
39mA
Current - Modulation
80mA
Current - Bias
100mA
Operating Temperature
-40°C ~ 85°C
Package / Case
16-VFQFN, CSP Exposed Pad
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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ADN2525
LOAD MISTERMINATION
Due to its excellent S22 performance, the ADN2525 can drive
differential loads that range from 5 Ω to 50 Ω. In practice, many
TOSAs have differential resistance less than 50 Ω. In this case,
with 50 Ω differential transmission lines connecting the
ADN2525 to the load, the load end of the transmission lines are
misterminated. This mistermination leads to signal reflections
back to the driver. The excellent back-termination in the
ADN2525 absorbs these reflections, preventing their reflection
back to the load. This enables excellent optical eye quality to be
achieved, even when the load end of the transmission lines is
significantly misterminated. The connection between the load
and the ADN2525 must be made with 50 Ω differential (25 Ω
single-ended) transmission lines so that the driver end of the
transmission lines is properly terminated.
POWER CONSUMPTION
The power dissipated by the ADN2525 is given by
where:
VCC is the power supply voltage.
IBIAS is the bias current generated by the ADN2525.
V
I
IMODP, and IMODN pins of the ADN2525 when
IBIAS = IMOD = 0 expressed in amps (see Table 1).
V
Considering V
V
To ensure long-term reliable operation, the junction tempera-
ture of the ADN2525 must not exceed 125°C, as specified in
SUPPLY
MSET
IBIAS
BSET
Figure 30. Allowable Range for the Voltage at IMODP and IMODN
P
P
is the average voltage on the IBIAS pin.
to IBIAS, the dissipated power becomes
is the voltage applied to the MSET pin.
is the sum of the current that flows into the VCC,
=
=
VCC
VCC
VCC + 1.1V
VCC – 1.1V
VCC
×
×
BSET
V
V
/IBIAS = 10 as the conversion factor from
13.5
13
IMODP, IMODN
MSET
MSET
5 .
+
+
I
I
SUPPLY
SUPPLY
NORMAL OPERATION REGION
+
+
V
V
IBIAS
10
BSET
×
×
IBIAS
V
IBIAS
Rev. A | Page 12 of 16
Table 2. For improved heat dissipation, the module’s case can be
used as heat sink, as shown in Figure 31. A compact optical
module is a complex thermal environment, and calculations of
device junction temperature using the package θ
ambient thermal resistance) do not yield accurate results.
PACKAGE
The following procedure can be used to estimate the IC
junction temperature:
• T
• T
• T
• P is the power dissipation in W.
• θ
• θ
T
at points inside the module, as shown in Figure 31. The thermo-
couples should be positioned to obtain an accurate measurement
of the package top and paddle temperatures. Using the model
shown in Figure 32, the junction temperature can be calculated by
where:
θ
P is the power dissipated by the ADN2525.
PCB
J-TOP
TOP
exposed pad.
J-TOP
J-PAD
THERMAL COMPOUND
TOP
PAD
J
DIE
COPPER PLANE
and T
is the IC junction temperature in °C.
T
and θ
J
is the temperature at top of package in °C.
is the temperature at package exposed paddle in °C.
is the thermal resistance from IC junction to package top.
=
is the thermal resistance from IC junction to package
P
Figure 32. Electrical Model for Thermal Calculations
PAD
J-PAD
×
(
Figure 31. Typical Optical Module Structure
can be determined by measuring the temperature
θ
are given in Table 2.
J
P
PAD
VIAS
×
θ
T
J
TOP
T
TOP
TOP
MODULE CASE
T PAD
θ
T
J
)
J
+
θ
T
PAD
θ
T
J-PAD
PAD
J-TOP
PAD
T
TOP
+
θ
×
J
θ
TOP
J
T
TOP
PAD
+
T
JA
THERMOCOUPLE
PAD
(junction-to-
×
θ
J
TOP

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