ADC1210S065HN/C1:5 NXP Semiconductors, ADC1210S065HN/C1:5 Datasheet - Page 31

• Manufacturer Part Number: ADC1210S065HN/C1:5
• Description: ADC1210S065HN/HVQFN40/REEL13DP
• Manufacturer: NXP Semiconductors

Specifications of ADC1210S065HN/C1:5

• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935289036518; ADC1210S065HN,518; ADC1210S065HN,518

NXP Semiconductors
Table 22.
Default values are highlighted.
Table 23.
Default values are highlighted.
ADC1210S_SER
Product data sheet
Bit
7 to 4
3
2 to 0
Bit
7 to 5
4
3
2
1 to 0
Symbol
-
LVDS_CMOS
OUTBUF
OUTBUS_SWAP
DATA_FORMAT[1:0]
Symbol
-
INTREF_EN
INTREF[2:0]
Internal reference control register (address 0008h) bit description
Output data standard control register (address 0011h) bit description
Access
R/W
R/W
Access
R/W
R/W
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Value
0000
0
1
000
001
010
011
100
101
110
111
Rev. 2 — 23 December 2010
Value
000
0
1
0
1
0
1
00
01
10
11
Description
not used
programmable internal reference enable
programmable internal reference
disable
active
FS = 2 V
FS = 1.78 V
FS = 1.59 V
FS = 1.42 V
FS = 1.26 V
FS = 1.12 V
FS = 1 V
reserved
Single 12-bit ADC; CMOS or LVDS DDR digital outputs
Description
not used
output data standard: LVDS DDR or CMOS
output buffers enable
output bus swapping
output data format
CMOS
LVDS DDR
output enabled
output disabled (high-Z)
no swapping
output bus is swapping (MSB becomes LSB and vice
versa)
offset binary
two’s complement
gray code
offset binary
ADC1210S series
© NXP B.V. 2010. All rights reserved.
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