ADC1112D125HN/C1:5 NXP Semiconductors, ADC1112D125HN/C1:5 Datasheet - Page 2

• Manufacturer Part Number: ADC1112D125HN/C1:5
• Description: ADC1112D125HN/HVQFN64/REEL13DP
• Manufacturer: NXP Semiconductors

Specifications of ADC1112D125HN/C1:5

• Number Of Bits: 11
• Sampling Rate (per Second): 125M
• Data Interface: Serial, SPI™
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
4. Ordering information
Table 1.
5. Block diagram
ADC1112D125
Product data sheet
Type number
ADC1112D125HN/C1
Ordering information
f
125
s
Fig 1. Block diagram
(Msps) Package
Name
HVQFN64 plastic thermal enhanced very thin quad flat package;
CLKM
CLKP
INAM
INBM
INAP
INBP
All information provided in this document is subject to legal disclaimers.
ADC1112D125
STAGE AND DUTY
CYCLE CONTROL
STAGE
CLOCK INPUT
STAGE
INPUT
INPUT
Description
no leads; 64 terminals; body 9 × 9 × 0.85 mm
T/H
T/H
Rev. 2 — 3 March 2011
CORRECTION AND
CORRECTION AND
PROCESSING
PROCESSING
ADC A CORE
ADC B CORE
PIPELINED
PIPELINED
Dual 11-bit ADC: CMOS or LVDS DDR digital outputs
DIGITAL
DIGITAL
ERROR
ERROR
11-BIT
11-BIT
REFBT
REFBB
SCLK/DFS
VCMB
REFERENCE AND
SENSE
SPI INTERFACE
MANAGEMENT
SDIO/ODS
SYSTEM
POWER
VREF
DRIVERS
DRIVERS
DRIVERS
OUTPUT
OUTPUT
OUTPUT
VCMA
CS
REFAT
REFAB
ADC1112D125
OTRA
CMOS:
DAV
or
LVDS/DDR:
DAVP
DAVM
OTRB
CTRL
CMOS:
DA10 to DA0
or
LVDS/DDR:
DA9_DA10_P to LOW_DA0_P
DA9_DA10_M to LOW_DA0_M
CMOS:
DB10 to DB0
or
LVDS/DDR:
DB9_DB10_P to LOW_DB0_P
DB9_DB10_M to LOW_DB0_M
005aaa161
© NXP B.V. 2011. All rights reserved.
Version
SOT804-3
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