ADAU1445YSVZ-3A-RL Analog Devices Inc, ADAU1445YSVZ-3A-RL Datasheet - Page 71

175MHZ SigmaDSP,2x8 SRCs

ADAU1445YSVZ-3A-RL

Manufacturer Part Number
ADAU1445YSVZ-3A-RL
Description
175MHZ SigmaDSP,2x8 SRCs
Manufacturer
Analog Devices Inc
Series
SigmaDSP®r
Type
Audio Processorr

Specifications of ADAU1445YSVZ-3A-RL

Applications
Automotive Audio
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Format
Fixed Point
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
1.8/3.3V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADAU1445YSVZ-3A-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
INTERFACING
When interfacing the ADAU1442/ADAU1445/ADAU1446 to oth
each pin.
DRIVE STRENGTH MODES AND SETTINGS
Bit Clock Pad Strength Register (Address 0xE247)
This register controls the pad drive strength of all bit clock pins
for most applications. The 6 mA setting should be used only
Table 71. Bit Descriptions of Bit Clock Pad Strength Register
Bit Position
[15:12]
11
10
9
8
7
6
5
4
3
2
1
0
WITH OTHER DEVICES
Description
Reserved
BCLK11
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK10
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK9
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK8
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK7
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK6
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK5
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK4
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK3
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK2
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK1
0 = low strength (2 mA)
1 = high strength (6 mA)
BCLK0
0 = low strength (2 mA)
1 = high strength (6 mA)
Rev. C | Page 71 of 92
when the int
configure
er devic
es in the system, it may be necessary to set the driv
egrity
d in m
of the signal is compromis
aster mode. The default 2
ADAU1442/ADAU1445/ADAU1446
mA se
ed.
tting should be adequate
Defau
0
0
0
0
0
0
0
0
0
0
0
0
e strength of
lt

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