AD9600BCPZ-105 Analog Devices Inc, AD9600BCPZ-105 Datasheet - Page 25

• Manufacturer Part Number: AD9600BCPZ-105
• Description: IC,A/D CONVERTER,DUAL,10-BIT,CMOS,LLCC,64PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9600BCPZ-105

• Number Of Bits: 10
• Sampling Rate (per Second): 105M
• Data Interface: Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 650mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

VOLTAGE REFERENCE
A stable and accurate voltage reference is built into the AD9600.
The input range can be adjusted by varying the reference voltage
applied to the AD9600, using either the internal reference or an
externally applied reference voltage. The input span of the ADC
tracks reference voltage changes linearly. The various reference
modes are summarized in this section. The Reference
Decoupling section describes the best PCB layout practices
for the reference.
Internal Reference Connection
A comparator within the AD9600 detects the potential at the
SENSE pin and configures the reference into four possible modes,
which are summarized in Table 11. If SENSE is grounded, the
reference amplifier switch is connected to the internal resistor
divider (see Figure 51), setting VREF to 1.0 V. Connecting the
SENSE pin to VREF switches the reference amplifier output to
the SENSE pin, completing the loop and providing a 0.5 V
reference output. If a resistor divider is connected external to
the chip as shown in Figure 52, the switch again selects the
SENSE pin. This puts the reference amplifier in a noninverting
mode with the VREF output defined as
The input range of the ADC always equals twice the voltage at
the reference pin for either an internal or an external reference.
Table 11. Reference Configuration Summary
Selected Mode
External Reference
Internal Fixed Reference
Programmable Reference
Internal Fixed Reference
VREF
1µF
=
VIN + A/VIN + B
VIN – A/VIN – B
0
Figure 51. Internal Reference Configuration
5 .
×
0.1µF
⎛ +
⎜
⎝
SENSE
1
VREF
R2
R1
⎞
⎟
⎠
SELECT
LOGIC
SENSE Voltage
AVDD
VREF
0.2 V to VREF
AGND to 0.2 V
AD9600
0.5V
CORE
ADC
Resulting VREF (V)
N/A
0.5
1.0
Rev. B | Page 25 of 72
0
5 .
×
⎛ +
⎜
⎝
1
R2
R1
⎞
⎟
⎠
If the internal reference of the AD9600 is used to drive multiple
converters to improve gain matching, the loading of the reference
by the other converters must be considered. Figure 53 depicts
how the internal reference voltage is affected by loading.
(see Figure 52)
–0.25
–0.50
–0.75
–1.00
–1.25
1µF
0
0
Figure 52. Programmable Reference Configuration
0.1µF
VIN + A/VIN + B
VIN – A/VIN – B
Figure 53. VREF Accuracy vs. Load
0.5
SENSE
R2
R1
Resulting Differential Span (V p-p)
2 × external reference
1.0
2 × VREF
2.0
VREF
LOAD CURRENT (mA)
VREF = 1.0V
1.0
SELECT
LOGIC
VREF = 0.5V
AD9600
1.5
0.5V
CORE
ADC
AD9600
2.0