AD9467BCPZ-250 Analog Devices Inc, AD9467BCPZ-250 Datasheet - Page 29

• Manufacturer Part Number: AD9467BCPZ-250
• Description: 16 Bit 250 MSPS ADC
• Manufacturer: Analog Devices Inc

Specifications of AD9467BCPZ-250

• Number Of Bits: 16
• Sampling Rate (per Second): 250M
• Data Interface: Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1.45W
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 72-VFQFN, CSP Exposed Pad
• Number Of Elements: 1
• Resolution: 16Bit
• Architecture: Pipelined
• Sample Rate: 250MSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±1.25V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 1.8/3.3V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Power Dissipation: 1.45W
• Differential Linearity Error: ±1LSB(Typ)
• Integral Nonlinearity Error: ±3LSB(Typ)
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 72
• Package Type: LFCSP EP
• Input Signal Type: Differential
• Sampling Rate: 250MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Supply Current: 31mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Addr.
(Hex)
ADC Functions
08
0D
0F
10
14
15
16
17
Parameter Name
modes
test_io
adc_input
offset
output_mode
output_adjust
output_phase
output_delay
(MSB)
Bit 7
X
X
XVREF
1 = on
0 = off
(default)
X
X
DCO
output
invert
1 = on
0 = off
(default)
DCO
delay
enable
1 = on
0 = off
(default)
Bit 6
X
X
X
0
X
X
X
Bit 5
X
Reset PN
long
gen
1 = on
0 = off
(default)
X
X
X
X
X
8-bit digital offset adjustment
Bit 4
X
Reset PN
short gen
1 = on
0 = off
(default)
X
Digital
output
disable
1 = on
0 = off
(default)
X
X
Rev. B | Page 29 of 32
1000 0001 = -126
1000 0000 = -127
0111 1111 = 127
0111 1110 = 126
1111 1111 = -1
1111 1110 = -2
0000 0010 = 2
0000 0001 = 1
0000 0000 = 0
5-bit digital clock output delay adjustment
…
…
Bit 3
X
X
1
Coarse
LVDS
adjust
0 =
3.0 mA
(default)
1 =
1.71 mA
X
Output test mode—see Table 10 in the
Digital Outputs and Timing section
0111 = one-/zero-word toggle
0100 = checkerboard output
0101 = PN 23 sequence
0001 = midscale short
0110 = PN 9 sequence
0 0000
0 0001
0 0010
0 0011
1 1111
0000 = off (default)
Bit 2
X
Analog
disconnect
1 = on
0 = off
(default)
Output
invert
1 = on
0 = off
(default)
X
0010 = +FS short
0011 = −FS short
…
Output current drive adjust
001 = 3.0 mA (default)
010 = 2.79 mA
011 = 2.57 mA
100 = 2.35 mA
101 = 2.14 mA
110 = 1.93 mA
111 = 1.71 mA
Bit 1
X
X
01 = full power-
Internal power-
binary (default)
10 = Gray code
00 = chip run
complement
down mode
Data format
00 = offset
01 = twos
(default)
down
select
(LSB)
Bit 0
X
X
Default
Value
(Hex)
0x00
0x00
0x08
0x00
0x00
0x00
0x00
0x00
Determines
various generic
modes of chip
operation.
When this
register is set,
the test data is
placed on the
output pins in
place of normal
data.
Analog input
functions.
Default Notes/
Comments
Bipolar, twos
complement
digital offset
adjustment in
LSBs.
Configures the
outputs and
the format of
the data.
Determines
LVDS or other
output
properties.
Determines
digital clock
output phase.
Determines
digital clock
output delay.
AD9467