AD9228ABCPZRL7-65 Analog Devices Inc, AD9228ABCPZRL7-65 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/0/57/analog_devices_inc_sml.jpg)
AD9228ABCPZRL7-65
Manufacturer Part Number
AD9228ABCPZRL7-65
Description
Quad 12-bit 65 MSPS Serial LVDS ADCPBFre
Manufacturer
Analog Devices Inc
Datasheet
1.AD9228ABCPZRL7-40.pdf
(56 pages)
Specifications of AD9228ABCPZRL7-65
Number Of Bits
12
Sampling Rate (per Second)
65M
Data Interface
Serial, SPI™
Number Of Converters
4
Power Dissipation (max)
510mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REVISION HISTORY
4/10—Rev. C to Rev. D
Changes to Table 16 ........................................................................ 35
Updated Outline Dimensions ........................................................ 53
Changes to Ordering Guide ........................................................... 53
12/09—Rev. B to Rev. C
Updated Outline Dimensions ........................................................ 53
Changes to Ordering Guide ........................................................... 54
7/07—Rev. A to Rev. B
Changes to Figure 3 ........................................................................... 7
Change to Table 7 ............................................................................ 10
5/07—Rev. 0 to Rev. A
Changes to Features .......................................................................... 1
Change to Effective Number of Bits (ENOB) ................................ 4
Changes to Logic Output (SDIO/ODM) Section.......................... 5
Added Endnote 3 to Table 3 ............................................................. 5
Changes to Pipeline Latency ............................................................ 6
Added Endnote 2 to Table 4 ............................................................. 6
Changes to Figure 2 to Figure 4 ....................................................... 7
Changes to Figure 10 ...................................................................... 12
Changes to Figure 15, Figure 17 to Figure 19, Figure 37, and
Changes to Figure 23 to Figure 26 Captions ................................ 15
Change to Figure 35 Caption ......................................................... 17
Added Figure 46 and Figure 47 ..................................................... 20
Figure 39 ...................................................................................... 14
Rev. D | Page 3 of 56
Changes to Figure 51 ...................................................................... 21
Changes to Clock Duty Cycle Considerations Section .............. 22
Changes to Power Dissipation and Power-Down Mode Section ... 23
Changes to Figure 61 to Figure 63 Captions ............................... 25
Changes to Table 9 Endnote .......................................................... 26
Changes to Digital Outputs and Timing Section ........................ 27
Added Table 10 ................................................................................ 27
Changes to RBIAS Pin Section ...................................................... 28
Deleted Figure 62 and Figure 63 ................................................... 27
Changes to Figure 67 ...................................................................... 29
Changes to Hardware Interface Section ....................................... 30
Added Figure 68 .............................................................................. 31
Changes to Table 15 ........................................................................ 31
Changes to Reading the Memory Map Table Section ................ 32
Change to Input Signals Section ................................................... 36
Changes to Output Signals Section ............................................... 36
Changes to Figure 71 ...................................................................... 36
Changes to Default Operation and
Changes to Alternative Analog Input
Changes to Figure 74 ...................................................................... 40
Changes to Table 17 ........................................................................ 48
Changes to Ordering Guide ........................................................... 52
4/06—Revision 0: Initial Version
Jumper Selection Settings Section ........................................... 37
Drive Configuration Section .................................................... 38
AD9228