AD9228ABCPZRL7-65 Analog Devices Inc, AD9228ABCPZRL7-65 Datasheet - Page 26

• Manufacturer Part Number: AD9228ABCPZRL7-65
• Description: Quad 12-bit 65 MSPS Serial LVDS ADCPBFre
• Manufacturer: Analog Devices Inc

Specifications of AD9228ABCPZRL7-65

• Number Of Bits: 12
• Sampling Rate (per Second): 65M
• Data Interface: Serial, SPI™
• Number Of Converters: 4
• Power Dissipation (max): 510mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9228
Less than 24 Inches on Standard FR-4, External 100 Ω Far Termination Only
Figure 61. Data Eye for LVDS Outputs in ANSI-644 Mode with Trace Lengths
Greater than 24 Inches on Standard FR-4, External 100 Ω Far Termination Only
Figure 62. Data Eye for LVDS Outputs in ANSI-644 Mode with Trace Lengths
–500
–200
500
100
200
100
–150ps
–100ps
50
50
0
0
0
0
ULS: 9600/15600
–1ns
–1ns
EYE: ALL BITS
EYE: ALL BITS
–100ps
–0.5ns
–0.5ns
–50ps
0ps
0ns
0ps
0ns
50ps
0.5ns
ULS: 10000/15600
0.5ns
100ps
1ns
1ns
150ps
100ps
Rev. D | Page 26 of 56
The format of the output data is offset binary by default. An
example of the output coding format can be found in Table 8.
To change the output data format to twos complement, see the
Memory Map section.
Table 8. Digital Output Coding
Code
4095
2048
2047
0
Data from each ADC is serialized and provided on a separate
channel. The data rate for each serial stream is equal to 12 bits
times the sample clock rate, with a maximum of 780 Mbps
(12 bits × 65 MSPS = 780 Mbps). The lowest typical conversion
rate is 10 MSPS. However, if lower sample rates are required for
a specific application, the PLL can be set up via the SPI to allow
encode rates as low as 5 MSPS. See the Memory Map section for
details on enabling this feature.
Termination on and Trace Lengths Greater than 24 Inches on Standard FR-4,
Figure 63. Data Eye for LVDS Outputs in ANSI-644 Mode with 100 Ω Internal
(VIN + x) − (VIN − x),
Input Span = 2 V p-p (V)
+1.00
0.00
−0.000488
−1.00
–200
–400
400
200
100
–150ps
50
0
0
–1ns
EYE: ALL BITS
–100ps
External 100 Ω Far Termination Only
–0.5ns
–50ps
0ps
0ns
Digital Output Offset Binary
(D11 ... D0)
1111 1111 1111
1000 0000 0000
0111 1111 1111
0000 0000 0000
50ps
ULS: 9599/15599
0.5ns
100ps
1ns
150ps