AD5722AREZ Analog Devices Inc, AD5722AREZ Datasheet - Page 30

• Manufacturer Part Number: AD5722AREZ
• Description: Dual 12Bit DAC 1 LSB INL
• Manufacturer: Analog Devices Inc

Specifications of AD5722AREZ

• Design Resources: Software Configurable 12-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5722 (CN0094)
• Settling Time: 10µs
• Number Of Bits: 12
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital, Dual ±
• Power Dissipation (max): 190mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Number Of Channels: 2
• Resolution: 12b
• Interface Type: Serial (3-Wire, SPI, QSPI, Microwire)
• Single Supply Voltage (typ): 5/9/12/15V
• Dual Supply Voltage (typ): ±5/±9/±12/±15V
• Architecture: Resistor-String
• Power Supply Requirement: Single/Dual
• Output Type: Voltage
• Integral Nonlinearity Error: ±1LSB
• Single Supply Voltage (min): 4.5V
• Single Supply Voltage (max): 16.5V
• Dual Supply Voltage (min): ±4.5V
• Dual Supply Voltage (max): ±16.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Package Type: TSSOP EP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5722/AD5732/AD5752
OUTLINE DIMENSIONS
ORDERING GUIDE
Model
AD5722AREZ
AD5722AREZ-REEL7
AD5732AREZ
AD5732AREZ-REEL7
AD5752AREZ
AD5752AREZ-REEL7
1
Z = RoHS Compliant Part.
1
0.10 COPLANARITY
0.15
0.05
Resolution (Bits)
12
12
14
14
16
16
1.20 MAX
24
SEATING
PLANE
1
TOP VIEW
Figure 45. 24-Lead Thin Shrink Small Outline Package, Exposed Pad [TSSOP_EP]
7.90
7.80
7.70
BSC
0.65
0.30
0.19
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
13
12
COMPLIANT TO JEDEC STANDARDS MO-153-ADT
4.50
4.40
4.30
1.05
1.00
0.80
Dimensions shown in millimeters
6.40 BSC
Rev. C | Page 30 of 32
8°
0°
(RE-24)
INL
±1 LSB
±1 LSB
±4 LSB
±4 LSB
±16 LSB
±16 LSB
0.20
0.09
BOTTOM VIEW
EXPOSED
(Pins Up)
5.02
5.00
4.95
PAD
TUE (% FSR)
±0.3
±0.3
±0.3
±0.3
±0.3
±0.3
0.75
0.60
0.45
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
Package Description
24-Lead TSSOP_EP
24-Lead TSSOP_EP
24-Lead TSSOP_EP
24-Lead TSSOP_EP
24-Lead TSSOP_EP
24-Lead TSSOP_EP
3.25
3.20
3.15
Package Option
RE-24
RE-24
RE-24
RE-24
RE-24
RE-24