AD5522JSVUZ Analog Devices Inc, AD5522JSVUZ Datasheet - Page 59

• Manufacturer Part Number: AD5522JSVUZ
• Description: Quad PPMU With DACs And LVDS/SPI
• Manufacturer: Analog Devices Inc

Specifications of AD5522JSVUZ

• Design Resources: Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CHANGING MODES
There are different ways of handling a mode change.
1.
2.
The following steps describe another method for changing modes:
1.
2.
Load any DAC X1 values that require changes. Remember
that for force amplifier and comparator DACs, X1 registers
are available per voltage and current range, so the user can
preload new DAC values to make DAC updates ahead of
time; the calibration engine calculates the X2 values and
stores them.
Change to the new PMU mode (FI or FV). This action
loads the new switch conditions to the PMU circuitry and
loads the DAC register with the stored X2 data.
In the PMU register (Bit 20 and Bit 19), enable the high-Z
voltage or high-Z current mode to make the amplifier high
impedance (SW5 open).
Load any DAC X1 values that require changes. Remember
that for force amplifier and comparator DACs, X1 registers
are available per voltage and current range, so the user can
preload new DAC values to make DAC updates ahead of
time; the calibration engine calculates the X2 values and
stores them.
R
(UP TO
±80mA)
R
(UP TO
±80mA)
SENSE
SENSE
DUT
DUT
Figure 58. External Components Required for Use with the AD5522
EXTFOH0
CFF0
FOH0
MEASVH0
EXTMEASIH0
EXTMEASIL0
EXTFOH1
CFF1
FOH1
MEASVH1
EXTMEASIH1
EXTMEASIL1
AVSS
AVSS
10µF
0.1µF
AVDD
AVDD
10µF
0.1µF
DVCC
DVCC
10µF
0.1µF
Rev. D | Page 59 of 64
DUTGND
VREF
REF
0.1µF
3.
4.
REQUIRED EXTERNAL COMPONENTS
The minimum required external components for use with
the AD5522 are shown in Figure 58. Decoupling is greatly
dependent on the type of supplies used, other decoupling on
the board, and the noise in the system. It is possible that more
or less decoupling may be required.
When the high-Z (voltage or current) mode is used, the
relevant DAC outputs are automatically updated (FIN,
CLL, and CLH DACs). For example, in high-Z voltage
mode, when new X1 writes occur, the FIN voltage X2 result
is calculated, cached, and loaded to the FIN DAC. When
forcing a voltage, current clamps are engaged, so the CLL
current register can be loaded, and the gain and offset
corrected and loaded to the DAC register. (The CLH
current register works the same way.)
Change to the new PMU mode (FI or FV). This action
loads the new switch conditions to the PMU circuitry.
Because the DAC outputs are already loaded, transients are
minimized when changing current or voltage mode.
EXTMEASIH3
EXTMEASIL3
EXTMEASIH2
EXTMEASIL2
CCOMP[0:3]
MEASVH3
MEASVH2
EXTFOH2
EXTFOH3
FOH3
FOH2
CFF3
CFF2
R
(UP TO
±80mA)
R
(UP TO
±80mA)
SENSE
DUT
SENSE
DUT
AD5522