AD5522JSVUZ Analog Devices Inc, AD5522JSVUZ Datasheet - Page 55

• Manufacturer Part Number: AD5522JSVUZ
• Description: Quad PPMU With DACs And LVDS/SPI
• Manufacturer: Analog Devices Inc

Specifications of AD5522JSVUZ

• Design Resources: Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

READBACK OF PMU REGISTER
The PMU register readback function is a 24-bit word that includes the mode and PMU data bits. Only one PMU register can be read back
at any one time.
Table 32. PMU Register Readback
Bit
23 (MSB)
22
PMU Register-Specific Bits
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4 to 0 (LSB)
Bit Name
MODE1
MODE0
CH EN
FORCE1
FORCE0
Reserved
C2
C1
C0
MEAS1
MEAS0
FIN
SF0
SS0
CL
CPOLH
Compare V/I
LTMPALM
TMPALM
Unused
readback bits
Description
Set the MODE1 and MODE0 bits to 0 to access the selected PMU register.
Channel enable. If this bit is high, the selected channel is enabled; if this bit is low, the channel is disabled.
These bits indicate which force mode the selected channel is in.
00 = FV and current clamp (if clamp is enabled).
01 = FI and voltage clamp (if clamp is enabled).
10 = high-Z FOHx voltage.
11 = high-Z FOHx current.
0.
These three bits indicate which forced or measured current range is set for the selected channel (see
Table 26).
These bits indicate which measure mode is selected: voltage, current, temperature sensor, or high-Z.
00 = MEASOUTx is connected to I
01 = MEASOUTx is connected to V
10 = MEASOUTx is connected to the temperature sensor.
11 = MEASOUTx is high-Z (SW12 open).
This bit shows the status of the force input (FIN) amplifier.
0 = input of the force amplifier switched to GND.
1 = input of the force amplifier connected to the FIN DAC output.
The system force and sense lines can be connected to any of the four PMU channels. These bits indicate
whether the system force and sense lines are switched in (see Table 26).
Read back the status of the individual current clamp enable bits.
1 = clamp is enabled on this channel.
0 = clamp is disabled on this channel.
When reading back information about the status of the current clamp enable function, the data that
was most recently written to the current clamp register from either the system control register or the
PMU register is available in the readback word.
Read back the status of the comparator output enable bit.
1 = PMU comparator output is enabled.
0 = PMU comparator output is disabled.
When reading back information about the status of the comparator output enable function, the data
that was most recently written to the comparator register from either the system control register or the
PMU register is available in the readback word.
1 = compare voltage function is enabled on the selected channel.
0 = compare current function is enabled on the selected channel.
TMPALM corresponds to the open-drain TMPALM output pin that flags a temperature event exceeding
the default or user programmed level. The temperature alarm is a per-device alarm; the latched
(LTMPALM) and unlatched (TMPALM) bits indicate whether a temperature event occurred and whether
the alarm still exists (that is, whether the junction temperature still exceeds the programmed alarm
level). To reset an alarm event, the user must write a 1 to the clear bit (Bit 6) in the PMU register.
Loads with 0s.
Rev. D | Page 55 of 64
SENSE
SENSE
.
.
AD5522