AD5522JSVUZ Analog Devices Inc, AD5522JSVUZ Datasheet - Page 57

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AD5522JSVUZ

Manufacturer Part Number
AD5522JSVUZ
Description
Quad PPMU With DACs And LVDS/SPI
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5522JSVUZ

Design Resources
Parametric Measurement Unit and Supporting Components for PAD Appls Using AD5522 and AD7685 (CN0104)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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READBACK OF DAC REGISTER
The DAC register readback function is a 24-bit word that includes the mode, address, and DAC data bits.
Table 35. DAC Register Readback
Bit
23 (MSB)
22
DAC Register-Specific Bits
21 to 16
15 to 0 (LSB)
Bit Name
MODE1
MODE0
A5 to A0
D15 to D0
Description
The MODE1 and MODE0 bits indicate the type of DAC register (X1, M, or C) that is read.
01 = DAC gain (M) register.
10 = DAC offset (C) register.
11 = DAC input data (X1) register.
Address bits indicating the DAC register that is read (see Table 29).
Contents of the addressed DAC register (X1, M, or C).
Rev. D | Page 57 of 64
AD5522

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