5962-9553601QXA National Semiconductor, 5962-9553601QXA Datasheet - Page 7

VERY HI SPD, HI CURRENT OP AMP

5962-9553601QXA

Manufacturer Part Number
5962-9553601QXA
Description
VERY HI SPD, HI CURRENT OP AMP
Manufacturer
National Semiconductor
Type
Voltage Feedback Amplifierr
Datasheet

Specifications of 5962-9553601QXA

Rail/rail I/o Type
No
Number Of Elements
1
Unity Gain Bandwidth Product
170MHz
Slew Rate
2000V/us
Common Mode Rejection Ratio
80dB
Input Offset Voltage
1.5mV
Input Bias Current
10uA
Single Supply Voltage (typ)
9/12/15/18/24/28V
Dual Supply Voltage (typ)
±3/±5/±9/±12/±15V
Power Dissipation
730mW
Voltage Gain In Db
75dB
Power Supply Rejection Ratio
85dB
Power Supply Requirement
Single/Dual
Shut Down Feature
No
Single Supply Voltage (min)
5.5V
Single Supply Voltage (max)
36V
Dual Supply Voltage (min)
±2.75V
Dual Supply Voltage (max)
±18V
Technology
BiCOM
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
10
Package Type
CPAK
Number Of Channels
1
Voltage Gain Db
75 dB
Common Mode Rejection Ratio (min)
80 dB
Operating Supply Voltage
9 V, 12 V, 15 V, 18 V, 24 V, 28 V
Supply Current
8 mA at +/- 5 V
Maximum Power Dissipation
730 mW
Maximum Operating Temperature
+ 125 C
Package / Case
CPAK
Maximum Dual Supply Voltage
+/- 18 V
Minimum Operating Temperature
- 55 C
Lead Free Status / Rohs Status
Not Compliant
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
junction to ambient thermal resistance), and T
θ
Note 3: The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this
improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through,
the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θ
not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor,
relative to the material of the package base. The stated θ
resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine
this with the stated value for the package, to calculate the total allowed power dissipation for the device.
Note 4: Human body model, 1.5 kΩ in series with 100 pF.
Note 5: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.
These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters
are guaranteed only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A.
Note 6: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150°C.
Note 7: Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For V
V
Note 8: The open loop output current is guaranteed, by the measurement of the open loop output voltage swing, using 100Ω output load.
Note 9: Slew Rate measured between ±4V.
Note 10: Differential input voltage is applied at V
Note 11: See AN00001 for SR test circuit.
Note 12: See AN00002 for GBW test circuit.
Note 13: All numbers apply for packages soldered directly into a PC board.
Note 14: Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table.
Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MIL-STD-883, with no enhanced low dose rate
sensitivity (ELDRS).
JA
OUT
or the number given in the Absolute Maximum Ratings, whichever is lower.
= ±1V.
A
(ambient temperature). The maximum allowable power dissipation at any temperature is P
S
= ±15V.
JC
thermal resistance is for the package material only, and does not account for the additional thermal
7
Jmax
(maximum junction temperature), θ
JA
, rather than θ
S
= ±15V, V
JC
, thermal resistance. It must
OUT
Dmax
= ±5V. For V
= (T
JA
www.national.com
(package
Jmax
S
- T
= ±5V,
A
)/

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