5962-8773901XA National Semiconductor, 5962-8773901XA Datasheet - Page 11

LO PWR LO OFFSET VOLT QUAD COM

5962-8773901XA

Manufacturer Part Number
5962-8773901XA
Description
LO PWR LO OFFSET VOLT QUAD COM
Manufacturer
National Semiconductor
Datasheet

Specifications of 5962-8773901XA

Number Of Elements
4
Output Type
Open Collector
Technology
Bipolar
Input Offset Voltage
2@5VmV
Single Supply Voltage (typ)
9/12/15/18/24/28V
Dual Supply Voltage (typ)
±3/±5/±9/±12V
Supply Current (max)
3@5VmA
Common Mode Rejection Ratio
70dB
Voltage Gain In Db
93.98dB
Power Supply Rejection Ratio
70dB
Power Supply Requirement
Single/Dual
Single Supply Voltage (min)
5V
Single Supply Voltage (max)
30V
Dual Supply Voltage (min)
±2.5V
Dual Supply Voltage (max)
±15V
Power Dissipation
680mW
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
14
Package Type
CPAK
Lead Free Status / Rohs Status
Not Compliant
Driving CMOS
Application Hints
The LM139 series are high gain, wide bandwidth devices
which, like most comparators, can easily oscillate if the output
lead is inadvertently allowed to capacitively couple to the in-
puts via stray capacitance. This shows up only during the
output voltage transition intervals as the comparator changes
states. Power supply bypassing is not required to solve this
problem. Standard PC board layout is helpful as it reduces
stray input-output coupling. Reducing this input resistors to <
10 kΩ reduces the feedback signal levels and finally, adding
even a small amount (1 to 10 mV) of positive feedback (hys-
20122104
teresis) causes such a rapid transition that oscillations due to
Driving TTL
stray feedback are not possible. Simply socketing the IC and
attaching resistors to the pins will cause input-output oscilla-
tions during the small transition intervals unless hysteresis is
used. If the input signal is a pulse waveform, with relatively
fast rise and fall times, hysteresis is not required.
All pins of any unused comparators should be tied to the neg-
ative supply.
The bias network of the LM139 series establishes a drain
current which is independent of the magnitude of the power
supply voltage over the range of from 2 V
to 30 V
.
DC
DC
It is usually unnecessary to use a bypass capacitor across the
20122105
power supply line.
AND Gate
The differential input voltage may be larger than V
+
without
damaging the device. Protection should be provided to pre-
vent the input voltages from going negative more than −0.3
V
(at 25°C). An input clamp diode can be used as shown
DC
in the applications section.
The output of the LM139 series is the uncommitted collector
of a grounded-emitter NPN output transistor. Many collectors
can be tied together to provide an output OR'ing function. An
output pull-up resistor can be connected to any available
power supply voltage within the permitted supply voltage
range and there is no restriction on this voltage due to the
magnitude of the voltage which is applied to the V
+
terminal
of the LM139A package. The output can also be used as a
simple SPST switch to ground (when a pull-up resistor is not
used). The amount of current which the output device can sink
is limited by the drive available (which is independent of V
+
)
and the β of this device. When the maximum current limit is
reached (approximately 16 mA), the output transistor will
20122108
come out of saturation and the output voltage will rise very
OR Gate
rapidly. The output saturation voltage is limited by the ap-
proximately 60Ω R
of the output transistor. The low offset
SAT
voltage of the output transistor (1 mV) allows the output to
clamp essentially to ground level for small load currents.
Typical Applications
(V
+
= 5.0 V
)
DC
Basic Comparator
20122109
20122103
11
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