WM8523GEFL/RV Wolfson Microelectronics, WM8523GEFL/RV Datasheet - Page 27

• Manufacturer Part Number: WM8523GEFL/RV
• Description: IC, DAC, STEREO, 2VRMS, 2CH, 24QFN
• Manufacturer: Wolfson Microelectronics

Specifications of WM8523GEFL/RV

• Resolution (bits): 24bit
• Sampling Rate: 192kSPS
• Input Channel Type: Serial
• Digital Ic Case Style: QFN
• No. Of Pins: 24
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Package: RoHS Compliant
• Data Interface: I2C, Serial, SPI
• Supply Voltage Range - Analogue: 2.97V To 3.63V
• Rohs Compliant: Yes

Pre-Production
DAC FEATURES
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SYSTEM ENABLE
The WM8523 includes a number of enable and disable mechanisms to allow the device to be powered
on and off in a pop-free manner. The SYS_ENA[1:0] control bits enable the DAC and analogue paths.
Note: MCLK must be present at all times when using the SYS_ENA[1:0] bits. If MCLK is stopped at any
point the device will power down to the ‘off’ state, but all register settings will remain. Restarting MCLK
will start the device internal power sequence and the device will return to the power state set by the
SYS_ENA[1:0] bits.
The power up and power down sequences are summarised in Figure 23. There is no requirement to
manually cycle the device through the sequence via register writes, as the device will always
automatically step through each stage in the sequence.
Power Up
When SYS_ENA[1:0]=00, the internal clocks are stopped and all analogue and digital blocks are
disabled for maximum power saving. The device starts up in this state in software mode. Setting
SYS_ENA[1:0]=01 enables the internal charge pump and required control circuitry, but the signal path
remains powered down. When SYS_ENA[1:0]=10 all blocks are powered up sequentially and full system
configuration is achieved. Once this is complete, the device is ready to pass audio but is muted. Setting
SYS_ENA[1:0]=11 releases the mute and audio playback begins.
Power Down
When SYS_ENA[1:0]=11 the device is powered up and passing audio. Changing SYS_ENA[1:0]=10
applies a digital softmute to the output. Setting SYS_ENA[1:0]=01 sequentially powers down all circuit
blocks but leaves the charge pump and required control circuitry enabled. This can be considered the
low-power standby state. Finally, setting SYS_ENA[1:0]=00 will disable all circuit blocks including the
charge pump, and full system initialisation will be required to restart the device.
Table 12 System Enable Control
REGISTER
ADDRESS
PSCTRL1
02h
R2
BIT
1:0
ENA[1:0]
LABEL
SYS_
DEFAULT
00
System Power Control
00 = Off
01 = Power down
10 = Power up and mute
11 = Power up and unmute
DESCRIPTION
PP, Rev 3.0, July 2009
WM8523
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