5M80ZT100C5N Altera, 5M80ZT100C5N Datasheet - Page 16

• Manufacturer Part Number: 5M80ZT100C5N
• Description: ALTERA
• Manufacturer: Altera
• Series: MAX Vr

Specifications of 5M80ZT100C5N

• Cpld Type: FLASH
• No. Of Macrocells: 64
• No. Of I/o's: 79
• Propagation Delay: 7.5ns
• Global Clock Setup Time: 4.6ns
• Frequency: 118.3MHz
• Supply Voltage Range: 1.71V To 1.89V
• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 1.71 V ~ 1.89 V
• Number Of Logic Elements/blocks: 80
• Number Of Macrocells: 64
• Number Of Gates: -
• Number Of I /o: 79
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Devices
Stratix Series Package and I/O Matrices
14
264, 66, 24
5SGXA7
5SGXA9
5SGXAB
5SGXB5
5SGXB6
5SGTC5
5SGTC7
5SGSD2
5SGSD3
5SGSD4
5SGSD5
5SGSD6
5SGSD8
5SEE9
5SEEB
5SGXA3
5SGXA4
5SGXA5
Numbers indicate GPIO count, LVDS count, and transceiver count.
Vertical migration (same V cc , GND, ISP, and input pins). User I/Os may be less than labelled for vertical migration.
Stratix series devices are offered in commercial and industrial temperatures and RoHS-compliant packages.
Altera Product Catalog
600, 150, 48
600, 150, 48
597, 149, 36
597, 149, 36
1,517 pin
40 x 40 (mm)
1.0-mm pitch
•
2011
•
432, 108, 66
432, 108, 66
1,517 pin
40 x 40 (mm)
1.0-mm pitch
www.altera.com
Stratix V GX, GT, GS, and E FPGAs (0.85 V), Up to 28G Transceivers
696, 174, 0
696, 174, 0
1,517 pin
40 x 40 (mm)
1.0-mm pitch
FBGA (F)
600, 150, 66
600, 150, 66
43 x 43 (mm)
1,760 pin
1.0-mm pitch
840, 210, 48
840, 210, 48
840, 210, 48
840, 210, 48
900, 225, 48
900, 225, 48
1,932 pin
45 x 45 (mm)
1.0-mm pitch
840, 210, 0
840, 210, 0
45 x 45 (mm)
1.0-mm pitch
1,932 pin