EA-OEM-204 Embedded Artists, EA-OEM-204 Datasheet - Page 2

• Manufacturer Part Number: EA-OEM-204
• Description: MCU, MPU & DSP Development Tools LPC2478-16 OEM BRD OEM BASE BRD W/TOUCH
• Manufacturer: Embedded Artists

Specifications of EA-OEM-204

• Processor To Be Evaluated: LPC2478
• Data Bus Width: 16 bit
• Interface Type: RS-232, Ethernet, USB, I2C, SPI, UART
• Core: ARM7TDMI-S
• Dimensions: 240 mm x 150 mm
• Maximum Operating Temperature: + 85 C
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC2478
Product data sheet
LCD controller, supporting both Super-Twisted Nematic (STN) and Thin-Film
Transistors (TFT) displays.
Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet
DMA, USB DMA, and program execution from on-chip flash with no contention.
EMC provides support for asynchronous static memory devices such as RAM, ROM
and flash, as well as dynamic memories such as single data rate SDRAM.
Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts.
General Purpose DMA (GPDMA) controller on AHB that can be used with the SSP,
I
Serial Interfaces:
Other peripherals:
Single 3.3 V power supply (3.0 V to 3.6 V).
4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as
the system clock.
Four reduced power modes: idle, sleep, power-down and deep power-down.
Four external interrupt inputs configurable as edge/level sensitive. All pins on port 0
and port 2 can be used as edge sensitive interrupt sources.
2
S-bus, and SD/MMC interface as well as for memory-to-memory transfers.
Dedicated DMA controller.
Selectable display resolution (up to 1024 × 768 pixels).
Supports up to 24-bit true-color mode.
Ethernet MAC with MII/RMII interface and associated DMA controller. These
functions reside on an independent AHB.
USB 2.0 full-speed dual port device/host/OTG controller with on-chip PHY and
associated DMA controller.
Four UARTs with fractional baud rate generation, one with modem control I/O, one
with IrDA support, all with FIFO.
CAN controller with two channels.
SPI controller.
Two SSP controllers, with FIFO and multi-protocol capabilities. One is an alternate
for the SPI port, sharing its interrupt. SSPs can be used with the GPDMA controller.
Three I
I
the GPDMA.
SD/MMC memory card interface.
160 General purpose I/O pins with configurable pull-up/down resistors.
10-bit ADC with input multiplexing among 8 pins.
10-bit DAC.
Four general purpose timers/counters with 8 capture inputs and 10 compare
outputs. Each timer block has an external count input.
Two PWM/timer blocks with support for three-phase motor control. Each PWM has
an external count inputs.
RTC with separate power domain. Clock source can be the RTC oscillator or the
APB clock.
2 kB SRAM powered from the RTC power pin, allowing data to be stored when the
rest of the chip is powered off.
WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,
the RTC oscillator, or the APB clock.
2
S (Inter-IC Sound) interface for digital audio input or output. It can be used with
2
C-bus interfaces (one with open-drain and two with standard port pins).
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 29 September 2010
Single-chip 16-bit/32-bit microcontroller
LPC2478
© NXP B.V. 2010. All rights reserved.
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