STEVAL-ISV009V1 STMicroelectronics, STEVAL-ISV009V1 Datasheet - Page 38

• Manufacturer Part Number: STEVAL-ISV009V1
• Description: Power Management Modules & Development Tools DUAL STG DC/AC CNVRT DEMO BRD
• Manufacturer: STMicroelectronics
• Series: -r

Specifications of STEVAL-ISV009V1

• Design Resources: STEVAL-ISV009V1 BOM STEVAL-ISV009V1 Schematic
• Main Purpose: DC/DC, Step Up
• Outputs And Type: 1, Non-Isolated
• Power - Output: -
• Voltage - Output: 36V
• Current - Output: -
• Voltage - Input: -
• Regulator Topology: Boost
• Frequency - Switching: -
• Board Type: Fully Populated
• Utilized Ic / Part: SPV1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Layout guidelines
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Layout guidelines
PCB layout is very important in order to minimize noise, high frequency resonance problems
and electromagnetic interference.
Paths between each inductor and relative pin must be designed with the same resistance.
Different resistance between the 4 branches can be the root cause of an unbalanced current
flow among the 4 branches. Unbalanced currents can imply damages and a bad tracking of
the MPPT.
Same approach must be followed for the 4 Vout tracks.
It is essential to keep as small as possible the paths where the high switching current
circulates, to reduce radiation and resonance problems.
Large traces for high current paths and an extended ground plane under the metal slug of
the package help reduce noise and heat dissipation (which is strongly impacted by the
thermal vias as well), furthermore increase the efficiency.
Boost Capacitors must be connected as close as possible to the Lx and CBx pins.
It is also suggested to connect the Boost Capacitor to the Lx track avoiding that its pad is
crossed by the high current on flowing on the Lx track.
The output and input capacitors should be very close to the device.
The external resistor dividers, if used, should be as close as possible to the Vin_sns and
Vout_sns pins of the device, and as far as possible from the high current circulating paths, to
avoid pick-up noise.
For an example of recommended layout see the following evaluation board (dimension
expressed in mm):
Figure 25. PCB layout example (top view)
Doc ID XXXXX Rev 1
AN3392