DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 368

• Manufacturer Part Number: DS33X42DK
• Description: Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
• Manufacturer: Maxim Integrated Products

Specifications of DS33X42DK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ID code will always have a 1 in the LSB position. The next 11 bits identify the manufacturer’s JEDEC number and
number of continuation bytes followed by 16 bits for the device and 4 bits for the version.
13.3 JTAG ID Codes
Table 13-2. ID Code Structure
13.4 Test Registers
IEEE 1149.1 requires a minimum of two test registers: the bypass register and the boundary scan register. An
optional test register has been included in the device. This test register is the identification register and is used in
conjunction with the IDCODE instruction and the Test-Logic-Reset state of the TAP controller.
13.4.1 Boundary Scan Register
This register contains both a shift register path and a latched parallel output for all control cells and digital I/O cells
and is n bits in length.
13.4.2 Bypass Register
This is a single one-bit shift register used in conjunction with the BYPASS, CLAMP, and HIGHZ instructions, which
provides a short path between JTDI and JTDO.
13.4.3 Identification Register
The identification register contains a 32-bit shift register and a 32-bit latched parallel output. This register is
selected during the IDCODE instruction and when the TAP controller is in the Test-Logic-Reset state.
Rev: 063008
DS33Xyy rev A1
DS33Xyy rev B1
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
DEVICE
REVISION
ID[31:28]
0000
0001
0000 0000 0000 0110
0000 0000 0000 0110
DEVICE CODE
ID[27:12]
MANUFACTURER’S CODE
000 1010 0001
000 1010 0001
ID[11:1]
REQUIRED
ID[0]
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1
1