DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 263

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DS33X42DK

Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X42DK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5B1h:
Default
Register Name:
Register Description:
Register Address:
5B0h:
Default
Bit 4: RSACK Change Interrupt Enable (RSACKIE) This bit enables an interrupt if the RSACKL bit is set.
Bit 3: SQ Change Interrupt Enable (SQIE) This bit enables an interrupt if the SQL bit is set.
Bit 2: CTRL Change Interrupt Enable (CTRIE) This bit enables an interrupt if the CTRLL bit is set.
Bit 0: Loss of Multiframe Sync Change Interrupt Enable (LOMIE[16:1]) This bit enables an interrupt if the
LOML bit is set.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = Interrupt for port n is Masked
1 = Interrupt for port n is Enabled
0 = Interrupt for port n is Masked
1 = Interrupt for port n is Enabled
0 = Interrupt for port n is Masked
1 = Interrupt for port n is Enabled
0 = Interrupt for port n is Masked
1 = Interrupt for port n is Enabled
Bit 15
Bit 7
0
0
-
-
Bit 14
Bit 6
0
0
-
-
VCAT.RSIE
VCAT Receive Serial Interrupt Enable Register
5B0h (+ 002h x (n-1), Physical WAN Port n=1 to 16)
Bit 13
Bit 5
0
0
-
-
RSACKIE
Bit 12
Bit 4
0
0
-
Bit 11
SQIE
Bit 3
0
0
-
CTRIE
Bit 10
Bit 2
0
0
-
Bit 9
Bit 1
0
0
-
-
263 of 375
LOMIE
Bit 8
Bit 0
0
0
-

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