DS33X42DK Maxim Integrated Products, DS33X42DK Datasheet - Page 338

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DS33X42DK

Manufacturer Part Number
DS33X42DK
Description
Power Management Modules & Development Tools Ethernet Over PDH Ma PDH Mapping Devices
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS33X42DK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
In RMII Mode, TX_EN is high with the first bit of the preamble. The TXD[1:0] is synchronous with the 50MHz
REF_CLK. For 10Mbps operation, the data bit outputs are updated every 10 clocks.
Figure 11-23. RMII Transmit Interface Functional Timing
RMII Receive data on RXD[1:0] is expected to be synchronous with the rising edge of the 50MHz REF_CLK. The
data is only valid if RX_CRS is high. The external PHY asynchronously drives RX_CRS low during carrier loss.
Figure 11-24. RMII Receive Interface Functional Timing
Rev: 063008
REF_CLK
RX_CRS
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
TX_EN
TXD[1:0]
REF_CLK
RXD[1:0]
P
P
R
R
E
E
A
A
M
M
B
B
L
L
E
E
F
F
C
C
S
S
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