S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 235

• Manufacturer Part Number: S1D15206F00A200
• Description: LCD Drivers LCD DRIVER
• Manufacturer: Epson

Specifications of S1D15206F00A200

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S1D15600/601/602 Series
8. COMMANDS
The Command Set
A0, RD(E) and WR(R/W) identify the data bus com-
mands. Interpretation and execution of commands are
synchronized to the internal clock. Since a busy check is
normally not needed, commands can be processed at
high speed.
For the 80-series MPU interface, the command is acti-
vated when a low pulse is entered in the RD pin during
read or when a low pulse is entered in the WR pin during
write. While the 68-series MPU interface is set to the
read status when a high pulse is entered in the R/W pin,
7–40
(1)Display ON/OFF
(2)Display START
(3)Page address set
(4)Column address set;
(4)Column address set;
(5)Status read
(6)Display data write
(7)Display data read
(8)ADC select
(9)Normal/reverse
(10)Display all points
(11)Duty select
(12)Duty +1
(13)n-line reverse
(14)n-line reverse
Line set
high-order 4 bits
low-order 4 bits
display
ON/OFF
register set
register release
Command
A0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
RD
Table 7. S1D15600/601/602 series command table
1
1
1
1
1
0
1
0
1
1
1
1
1
1
1
WR
0
0
0
0
0
1
0
1
0
0
0
0
0
0
0
D7
1
0
1
0
0
1
1
1
1
1
0
0
D6
0
1
0
0
0
0
0
0
0
0
0
0
Status
Code
EPSON
D5
1
1
0
0
1
1
1
1
1
1
1
Read Data
Write Data
D4
0
1
1
0
0
0
0
0
0
1
0
and it is set to the write status when a low pulse is entered
in this pin. The command is activated when a high pulse
is entered in the E pin. (For their timings, see Section 10
“Timing Characteristics.”) Therefore, the 68-series MPU
interface differs from the 80-series MPU interface in the
point where the RD (or E) signal is 1 (or high) during
status read and during display data read explained in the
command description and on the command table. The
following command description uses an 80-series MPU
interface example.
If the serial interface is selected, data is sequentially
entered from D7.
Dispaly start address
D3
1
0
0
0
0
1
1
0
No. of reversed
n-lines
column address
column address
Page address
High-order
Low-order
D2
1
0
0
1
1
0
0
0
D1
1
0
0
1
0
0
1
0
D0
0
1
0
0
1
0
1
0
1
0
1
0
1
0
Turns the LCD display ON
and OFF
0 : OFF
1 : ON
Determines the RAM
display line for COM 0
Sets the display RAM
pages in the Page
Address register.
Sets the high order 4
bits of the display RAM
column address in the
register.
Sets the low-order 4 bits
of the display RA
column address in the
register.
Reads the status
information.
Writes data in the display
RAM.
Reads data from the
display RAM.
Outputs the display RAM
address for SEG.
0: Normal 1: Reversed
Displays the LCD image
in normal or reverse
mode.
0: Normal 1: Reversed
Lights all segments.
0: Normal display
1: All ON
Sets LCD drive duty (1).
0:1/24, 48 1:1/32, 64
Sets LCD drive duty (2).
0: Normal 1: Duty+1
Sets the line reverse
driving and No. of
reverse lines in the line
reverse register.
Releases the line reverse
driving.
Function
Rev. 4.6