S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 175

• Manufacturer Part Number: S1D15206F00A200
• Description: LCD Drivers LCD DRIVER
• Manufacturer: Epson

Specifications of S1D15206F00A200

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

S1D15400 Series
Display Start Line and Line Count
Registers
The contents of this register form a pointer to a line of
data in display data RAM corresponding to the first line
of the display (COM0), and are set by the “Set Display
Start Line” command (see section 3).
The contents of the display start-line register are copied
into the line count register at the start of every frame, that
is on each edge of FR. The line count register is
incremented by the CL clock once for every display line,
thus generating a pointer to the current line of data in
display data RAM being transferred to the segment
driver ciruits.
Column Address Counter
The column address counter is a 7-bit presettable counter
which supplies the column address (see figure 2) for
MPU accesses to the display data RAM. The counter is
incremented by one every time the driver receives a Read
6–10
EPSON
or Write Display Data Command.
Addresses above 50 H are invalid, and the counter will
not increment past this valu. The contents of the column
address conter are set with the Set Column Address
command.
Page Register
The page register is a 2-bit register which supplies the
page address (see figure 2) for MPU accesses to the
display data RAM. The contents of the Page Register are
set by the Set Page Register Command.
Display Data RAM
The display data RAM stores the LCD display data, on a
1-bit per pixel basis. The relation-ship between display
data, display address and the display is shown in figure
2.
Rev. 1.0