CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 7

Eval Bd LP Codec W/Class D Spkr Driver

CDB42L52

Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L52

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
CDB42L52
2.1
Board Configuration Tab
The “Board Configuration” tab provides high-level control of signal routing on the CDB42L52. This tab also
includes basic controls that allow “quick setup” in a number of simple board configurations. Status text de-
tailing the CODEC’s specific configuration appears directly below the associated control. This text may
change depending on the setting of the associated control. A description of each control group is outlined
below:
CS42L52 CODEC Basic Configuration - Register controls for CS42L52 basic setup like interface format,
clocking functions and analog input signal routing. See
Section 2.2
through
Section 2.5
for more controls in
the CS42L52.
CS8416 S/PDIF Receiver Control - Register controls for setting up the CS8416.
CS8406 S/PDIF Transmitter Control - Register controls for setting up the CS8406.
Clock/Data Routing and Selection - Includes controls used for routing clocks and data between the
CS42L52, CS8416, oscillator, I/O stake header, SRC and PFD. Also includes a reset control for the
CS42L52.
Update - Reads all registers in the FPGA, CS42L52 and CS8421 and shows the current values in the GUI.
Reset - Resets FPGA to default routing configuration.
Figure 1. Board Configuration Tab
DS680DB1
7

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