IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 143

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 5: Functional Descriptions
Test Pattern Generator
Test Pattern Generator
January 2011 Altera Corporation
Test Pattern
1. Switch MegaCore function—Write to the DoutN Output Control registers setting
2. Switch MegaCore function—Enable the function by writing 1 to address 0
3. Switch MegaCore function—Write to the DoutN Output Control registers to
4. Control Synchronizer MegaCore function—Set up the Control Synchronizer to
For information about the compile time parameters for the Switch MegaCore
function, refer to
register map, refer to
to
The Test Pattern Generator MegaCore function can be used to produce a video stream
compliant with the Avalon-ST Video protocol that feeds a video system during its
design cycle. The Test Pattern Generator MegaCore function produces data on request
and consequently permits easier debugging of a video data path without the risks of
overflow or misconfiguration associated with the use of the Clocked Video Input
MegaCore function or of a custom component using a genuine video input.
The Test Pattern Generator MegaCore function can generate either a uniform image
using a constant color specified by the user at compile time or a set of predefined color
bars. Both patterns are delimited by a black rectangular border. The color bar pattern
(Figure
intensity (white, yellow, cyan, green, magenta, red, blue, black).
Figure 5–29. Color Bar Pattern
Table 6–18 on page
up the outputs. For example:
a. Write 1 to address 3
b. Write 2 to address 4
switch the outputs. For example:
a. Write 2 to address 3
b. Write 1 to address 4
write a 1 to the Switch MegaCore function’s Output Switch register on the next
start of an image packet.
5–29) is a still image composed with a set of eight vertical color bars of 75%
Table 3–22 on page
Table 7–20 on page
6–21.
3–21. For information about the run-time control
7–16. For information about the signals, refer
Video and Image Processing Suite User Guide
5–63