IP-POSPHY4 Altera, IP-POSPHY4 Datasheet - Page 62
IP-POSPHY4
Manufacturer Part Number
IP-POSPHY4
Description
IP CORE - POS-PHY Level 4 SPI 4.2 Interface
Manufacturer
Altera
Type
MegaCorer
Datasheet
1.IP-POSPHY4.pdf
(144 pages)
Specifications of IP-POSPHY4
Software Application
IP CORE, Interface And Protocols, COMMUNICATION
Supported Families
Arria GX, Cyclone, HardCopy, Stratix
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Function
POS-PHY Level 4 Interface, Link-Layer/PHY Layer
License
Initial License
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
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4–22
POS-PHY Level 4 MegaCore Function User Guide
Missing SOP
If incoming data contains one or more EOPs without corresponding SOPs (refer to
Figure
This deassertion indicates that the current data between the SOP to EOP transition is a
valid packet, and that everything following the EOP is discarded until the next SOP is
received. None of the packets are marked as errored, so it is up to the user logic to
determine which cells or packets have been dropped.
Figure 4–9. Missing SOP Input Timing Diagram
Figure 4–10. Missing SOP Output Timing Diagram
4–9), the block deasserts the enable after the last EOP (refer to
err_ry_msopN
aN_arxsop
aN_arxeop
aN_arxena
aN_arxtclk
aN_arxerr
aN_arxsop
aN_arx eop
aN_arxena
aN_arxtclk
aN_arxerr
Chapter 4: Functional Description—Receiver
Missing SOP
December 2010 Altera Corporation
Error Flagging and Handling
Figure
4–10).
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