EVAL-AD5754REBZ Analog Devices Inc, EVAL-AD5754REBZ Datasheet

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FEATURES Complete, quad, 12-/14-/16-bit DACs Operates from single/dual supplies Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum Total unadjusted error (TUE): 0.1% ...

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AD5724R/AD5734R/AD5754R TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications ..................................................................................... 4 AC Performance Characteristics ................................................ 6 Timing Characteristics ................................................................ 6 Timing Diagrams .......................................................................... 7 Absolute ...

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FUNCTIONAL BLOCK DIAGRAM AD5724R/AD5734R/AD5754R DV CC SDIN SCLK SYNC SDO CLR BIN/2sCOMP AD5724R 12-BIT AD5734R 14-BIT AD5754R 16-BIT 2.5V REFERENCE n INPUT DAC REGISTER A REGISTER A INPUT SHIFT REGISTER ...

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AD5724R/AD5734R/AD5754R SPECIFICATIONS 4 16 −4 kΩ 200 pF, all specifications T LOAD LOAD Table 2. Parameter ACCURACY Resolution AD5754R AD5734R AD5724R Total Unadjusted ...

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Parameter Min 3 DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Pin Capacitance 3 DIGITAL OUTPUTS (SDO) Output Low Voltage Output High Voltage Output Low Voltage ...

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AD5724R/AD5734R/AD5754R AC PERFORMANCE CHARACTERISTICS 4 16 −4 200 pF, all specifications LOAD MIN Table 3. 2 Parameter DYNAMIC PERFORMANCE Output Voltage Settling Time ...

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TIMING DIAGRAMS SCLK SYNC t 7 SDIN DB23 t 9 LDAC V x OUT V x OUT CLR V x OUT SCLK SYNC SDIN SDO ...

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AD5724R/AD5734R/AD5754R SCLK 1 SYNC SDIN INPUT WORD SPECIFIES REGISTER TO BE READ SDO UNDEFINED Figure 4. Readback ...

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ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 5. Parameter Rating AV to GND −0 + GND +0.3 V ...

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AD5724R/AD5734R/AD5754R PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 AV Negative Analog Supply Pin. Voltage range is from –4 –16.5 V. This pin can be connected ...

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TYPICAL PERFORMANCE CHARACTERISTICS 6 AV /AV = +12V/0V, RANGE = +10V /AV = ±12V, RANGE = ±10V /AV = ±6.5V, RANGE = ± /AV = +6.5V/0V, RANGE = +5V DD ...

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AD5724R/AD5734R/AD5754R –2 –4 –6 –8 –40 – TEMPERATURE (°C) Figure 12. AD5754R Integral Nonlinearity Error vs. Temperature 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –40 – TEMPERATURE (°C) Figure 13. ...

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BIPOLAR 10V MIN 0 UNIPOLAR 10V MIN BIPOLAR 10V MAX UNIPOLAR 10V MAX –0.01 –0.02 –0.03 –0.04 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 SUPPLY (V) Figure 18. AD5754R Total Unadjusted Error vs. Supply Voltage 0.04 0.03 ...

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AD5724R/AD5734R/AD5754R 0.010 ±5V RANGE, CODE = 0xFFFF ±10V RANGE, CODE = 0xFFFF +10V RANGE, CODE = 0xFFFF +5V RANGE, CODE = 0xFFFF 0.005 ±5V RANGE, CODE = 0x0000 ±10V RANGE, CODE = 0x0000 0 –0.005 –0.010 –0.015 –0.020 –25 –20 ...

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RANGE = ±5V RANGE = +10V RANGE = +5V RANGE = ±10V CH1 5µ Figure 30. Peak-to-Peak Noise, 0 Bandwidth 1 RANGE = ±5V RANGE = +10V RANGE = +5V RANGE = ±10V ...

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AD5724R/AD5734R/AD5754R 3.0 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 –0.18 –0.13 –0.08 –0.03 0.02 LOAD CURRENT (mA) Figure 36. REFOUT Voltage vs. Load Current 15 AV /AV = +12V/0V, RANGE = +10V /AV = ...

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DEVICES SHOWN 2.50100 2.50080 2.50060 2.50040 2.50020 2.50000 2.49980 –40 – TEMPERATURE (°C) Figure 42. Reference Output Voltage vs. Temperature (−40°C to+ 85°C) 2.50120 2.50100 2.50080 2.50060 2.50040 2.50020 2.50000 2.49980 Figure ...

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AD5724R/AD5734R/AD5754R TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy, or integral nonlinearity measure of the maximum deviation in LSBs from a straight line passing through the endpoints of the DAC transfer function. A typical ...

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DC Crosstalk DC crosstalk is the dc change in the output level of one DAC in response to a change in the output of another DAC measured with a full-scale output change on one DAC while monitoring another ...

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AD5724R/AD5734R/AD5754R THEORY OF OPERATION The AD5724R/AD5734R/AD5754R are quad, 12-/14-/16-bit, serial input, unipolar/bipolar, voltage output DACs. They operate from single supply voltages of +4 +16 dual supply voltages of ±4 ±16 addition, the ...

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Standalone Operation The serial interface works with both a continuous and a noncontinuous serial clock. A continuous SCLK source can only be used if SYNC is held low for the correct number of clock cycles. In gated clock mode, a ...

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AD5724R/AD5734R/AD5754R LOAD DAC (LDAC) After data has been transferred into the input register of the DACs, there are two ways to update the DAC registers and DAC outputs. Depending on the status of both SYNC and LDAC , one of ...

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Ideal Output Voltage to Input Code Relationship—AD5754R Table 8. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 1111 +2 × REFIN × (32,767/32,768) 1111 1111 1111 1110 +2 × REFIN × (32,766/32,768) ...

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AD5724R/AD5734R/AD5754R Ideal Output Voltage to Input Code Relationship—AD5734R Table 11. Bipolar Output, Offset Binary Coding Digital Input MSB LSB 11 1111 1111 1111 11 1111 1111 1110 … … … … 10 0000 0000 0001 10 0000 0000 0000 01 ...

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Ideal Output Voltage to Input Code Relationship—AD5724R Table 14. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 +2 × REFIN × (2047/2048) 1111 1111 1110 +2 × REFIN × (2046/2048) … … ...

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AD5724R/AD5734R/AD5754R INPUT REGISTER The input register is 24 bits wide and consists of a read/write bit ( reserved bit (zero) which must always be set to 0, three register select bits (REG1, REG2, REG3), three DAC address ...

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DAC REGISTER The DAC register is addressed by setting the three REG bits to 000. The DAC address bits select the DAC channel which the data transfer is to take place (see Table 18). The data bits are in positions ...

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AD5724R/AD5734R/AD5754R CONTROL REGISTER The control register is addressed by setting the three REG bits to 011. The value written to the address and data bits determines the control function selected. The control register options are shown in Table 24 and ...

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POWER CONTROL REGISTER The power control register is addressed by setting the three REG bits to 010. This register allows the user to control and determine the power and thermal status of the AD5724R/AD5734R/AD5754R. The power control register options are ...

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AD5724R/AD5734R/AD5754R DESIGN FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up. When the supply voltages change during power-up, the V clamped via a low impedance ...

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APPLICATIONS INFORMATION +5 V/±5 V OPERATION When operating from a single +5 V supply or a dual ±5 V supply, an output range ± not achievable because sufficient headroom for the output amplifier is ...

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... ORDERING GUIDE 1 Model Resolution AD5724RBREZ 12 AD5724RBREZ-REEL7 12 AD5734RBREZ 14 AD5734RBREZ-REEL7 14 AD5754RBREZ 16 AD5754RBREZ-REEL7 16 EVAL-AD5754REBZ RoHS Compliant Part. ©2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 13 4.50 EXPOSED 4.40 (Pins Up) 4.30 6.40 BSC 12 BOTTOM VIEW 1.05 1.00 8° ...