AFCT-5942TGZ Avago Technologies US Inc., AFCT-5942TGZ Datasheet - Page 2

• Manufacturer Part Number: AFCT-5942TGZ
• Description: OC48 IR SFF, RoHS 0/70
• Manufacturer: Avago Technologies US Inc.
• Series: METRAKr

Specifications of AFCT-5942TGZ

• Data Rate: 2488Mbps
• Wavelength: 1300nm
• Applications: General Purpose
• Voltage - Supply: 3.1 V ~ 3.5 V
• Connector Type: LC Duplex
• Mounting Type: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 1. Receiver Block Diagram
2
in an optical subassembly. This optical subassembly is
coupled to a postamp/decision circuit on a circuit board.
The design of the optical assembly is such that it pro-
vides better than 27 dB Optical Return Loss (ORL).
The postamplifier is ac coupled to the preamplifier as il-
lustrated in Figure 1. The coupling capacitors are large
enough to pass the SONET/SDH test pattern at 2488 Mb/s
without significant distortion or performance penalty.
For codes which have a significantly lower frequency
content, jitter and pulse distortion could be degraded.
The receiver outputs are squelched at Signal Detect
deasserts. That is, when the light input decreases to typi-
cal -27 dBm or less, the Signal Detect deasserts i.e. the
SD Output goes to a TTL low state. This forces the DATA
OUT and DATA OUT Bar to go PECL levels high and low
respectively.
Figure 1 also shows a filter function which limits the
bandwidth of the preamp output signal. The filter is de-
signed to bandlimit the preamp output noise and thus
improve the receiver sensitivity.
Functional Description
Receiver Section
Design
The receiver section for the AFCT-5942xxxZ contains an
InGaAs/InP photo detector and a preamplifier mounted
PHOTODETECTOR
BIAS
TRANS-
IMPEDANCE
PRE-
AMPLIFIER
GND
FILTER
AMPLIFIER
CIRCUIT
SIGNAL
DETECT
These components will reduce the sensitivity of the re-
ceiver as the signal bit rate is increased above 2.7 Gb/s.
As an optional feature the device also incorporates a
photodetector bias circuit. The circuit works by providing
a mirrored output of the bias current within the photo-
diode. This output must be connected to V
monitored by connecting through a series resistor (see
Application Section).
Noise Immunity
The receiver includes internal circuit components to filter
power supply noise. However under some conditions of
EMI and power supply noise, external power supply filter-
ing may be necessary (see Application Section).
The Signal Detect Circuit
The signal detect circuit works by sensing the peak level
of the received signal and comparing this level to a refer-
ence. The SD output is low voltage TTL.
PECL
OUTPUT
BUFFER
TTL
OUTPUT
BUFFER
DATA OUT
DATA OUT
SD
CC
and can be