ADNS-2051 Avago Technologies US Inc., ADNS-2051 Datasheet - Page 9

• Manufacturer Part Number: ADNS-2051
• Description: Optical Mouse Sensor,DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-2051

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: Q2072083C

9
Recommended Operating Conditions
Parameter
Operating Temperature
Power Supply Voltage
Power Supply Rise Time
Supply Noise
Clock Frequency
Serial Port Clock Frequency
Resonator Impendance
Distance from Lens Reference
Plane to Surface
Speed
Acceleration
Light Level onto IC
SDIO Read Hold Time
SDIO Serial Write-Write Time
SDIO Serial Write-Read Time
SDIO Serial Read-Write Time
SDIO Serial Read-Read Time
Data Delay after PD
SDIO Write Setup Time
PD Pulse Width
(to power down the chip)
PD Pulse Width
(to reset the serial port)
Frame Rate
Bin Resistor
Symbol
T
V
V
V
f
SCLK
X
Z
S
A
IRR
t
t
t
t
t
t
t
t
t
FR
R1
CLK
HOLD
SWW
SWR
SRW
SRR
COMPUTE
SETUP
PDW
PDR
A
DD
RT
N
RES
INC
Min.
0
4.25
17.4
2.3
0
80
100
100
100
100
120
120
3.2
60
700
100
15 K
Typ.
5.0
18.0
2.4
1500
15 K
Max.
40
5.5
100
100
18.7
f
55
2.5
14
0.15
25,000
30,000
37 K
CLK
/4
Units
˚C
volts
ms
mV
MHz
MHz
:
mm
in/sec
g
mW/m
μs
μs
μs
ns
ns
ms
ns
μs
μs
frames/s See Frame_Period register
:
2
Notes
Register values retained for
voltage transients below
4.25 V but greater than 4 V.
Peak to peak within
0-100 MHz.
Set by ceramic resonator.
Results in ±0.2 mm DOF.
(See Figure 10.)
@ frame rate = 1500/second.
@ frame rate = 1500/second.
O = 639 nm
O = 875 nm
Hold time for valid data.
(Refer to Figure 28.)
Time between two write
commands. (Refer to Figure 31.)
Time between write and read
operation. (Refer to Figure 32.)
Time between read and write
operation. (Refer to Figure 33.)
Time between two read
commands. (Refer to Figure 33.)
After t
contain data from first image
after PD . Note that an addi-
tional 75 frames for AGC (shutter)
stabilization may be required if
mouse movement occurred
while PD was high. (Refer to
Figure 12.)
Data valid time before the rising
of SCLK. (Refer to Figure 26.)
Pulse width to initiate the power
down cycle @ 1500 fps. (Refer
to Figure 12 and Figure 14.)
Pulse width to reset the serial
port @ 1500 fps (but may also
initiate a power down cycle.
Normal PD recovery sequence
to be followed. (Refer to
Figure 15.)
section.
Refer to Figure 8.
COMPUTE
, all registers