PIC18LF4682-I/ML Microchip Technology, PIC18LF4682-I/ML Datasheet - Page 280
![80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 44 QFN 8x8x0.9mm TUBE](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18LF4682-I/ML
Manufacturer Part Number
PIC18LF4682-I/ML
Description
80KB Flash, 3KB RAM, ECAN, 1024 EEPROM 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18LF4682-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
80KB (40K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
44
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 280 of 484
- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
EXAMPLE 23-1:
EXAMPLE 23-2:
DS39761C-page 280
WakeupInterrupt
NoInterrupt
ConfigWait:
; Save application required context.
; Poll interrupt flags and determine source of interrupt
; This was found to be CAN interrupt
; TempCANCON and TempCANSTAT are variables defined in Access Bank low
MOVFF
MOVFF
MOVF
ANDLW
ADDWF
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BCF
;
; User code to handle wake-up procedure
;
;
; Continue checking for other interrupt source or return from here
…
…
; Request Configuration mode.
MOVLW
MOVWF
; A request to switch to Configuration mode may not be immediately honored.
; Module will wait for CAN bus to be idle before switching to Configuration Mode.
; Request for other modes such as Loopback, Disable etc. may be honored immediately.
; It is always good practice to wait and verify before continuing.
MOVF
ANDLW
TSTFSZ WREG
BRA
; Module is in Configuration mode now.
; Modify configuration registers as required.
; Switch back to Normal mode to be able to communicate.
CANCON, TempCANCON
CANSTAT, TempCANSTAT
TempCANSTAT, W
B’00001110’
PCL, F
NoInterrupt
ErrorInterrupt
TXB2Interrupt
TXB1Interrupt
TXB0Interrupt
RXB1Interrupt
RXB0Interrupt
PIR3, WAKIF
B’10000000’
CANCON
CANSTAT, W
B’10000000’
ConfigWait
CHANGING TO CONFIGURATION MODE
WIN AND ICODE BITS USAGE IN INTERRUPT SERVICE ROUTINE TO ACCESS
TX/RX BUFFERS
; Save CANCON.WIN bits
; This is required to prevent CANCON
; from corrupting CAN buffer access
; in-progress while this interrupt
; occurred
; Save CANSTAT register
; This is required to make sure that
; we use same CANSTAT value rather
; than one changed by another CAN
; interrupt.
; Retrieve ICODE bits
; Perform computed GOTO
; to corresponding interrupt cause
; 000 = No interrupt
; 001 = Error interrupt
; 010 = TXB2 interrupt
; 011 = TXB1 interrupt
; 100 = TXB0 interrupt
; 101 = RXB1 interrupt
; 110 = RXB0 interrupt
; 111 = Wake-up on interrupt
; Clear the interrupt flag
; PC should never vector here. User may
; place a trap such as infinite loop or pin/port
; indication to catch this error.
; Set to Configuration Mode.
; Read current mode state.
; Interested in OPMODE bits only.
; Is it Configuration mode yet?
; No. Continue to wait...
© 2009 Microchip Technology Inc.
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