PIC18LF4221-I/ML Microchip Technology, PIC18LF4221-I/ML Datasheet - Page 265

• Manufacturer Part Number: PIC18LF4221-I/ML
• Description: 4 KB Flash, 512 RAM 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF4221-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 24-6:
REGISTER 24-7:
© 2009 Microchip Technology Inc.
bit 7
bit 6
bit 5-0
bit 7-2
bit 1
bit 0
CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
PIC18F2221/2321/4221/4321 FAMILY
CPD: Data EEPROM Code Protection bit
1 = Data EEPROM not code-protected
0 = Data EEPROM code-protected
CPB: Boot Block Code Protection bit
1 = Boot block not code-protected
0 = Boot block code-protected
Unimplemented: Read as ‘0’
bit 7
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Unimplemented: Read as ‘0’
CP1: Code Protection bit
1 = Block 1 not code-protected
0 = Block 1 code-protected
CP0: Code Protection bit
1 = Block 0 not code-protected
0 = Block 0 code-protected
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Note 1: See Figure 24-5 for variable block boundaries.
R/C-1
Note 1: See Figure 24-5 for variable block boundaries.
CPD
U-0
—
R/C-1
CPB
U-0
—
C = Clearable bit
C = Clearable bit
(1)
(1)
U-0
U-0
—
—
(1)
(1)
(1)
(1)
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
U-0
—
—
U-0
U-0
—
—
R/C-1
CP1
U-0
—
DS39689F-page 265
R/C-1
CP0
U-0
—
bit 0
bit 0