PIC18F64J90-I/PT Microchip Technology, PIC18F64J90-I/PT Datasheet - Page 400

• Manufacturer Part Number: PIC18F64J90-I/PT
• Description: Microcontroller
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J90-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F85J90 FAMILY
APPENDIX B:
Devices in the PIC18F85J90 and PIC18F8490 families
are very similar in their functions and feature sets.
However, there are some potentially important differ-
TABLE B-1:
DS39770C-page 400
Operating Frequency
Supply Voltage
Operating Current
Program Memory Size (maximum)
Program Memory Endurance
Program Memory Retention
Programming Time (Normalized)
I/O Sink/Source at 25 mA
Input Voltage Tolerance on I/O Pins
I/O
LCD Outputs (maximum pixels,
segments x commons)
LCD Bias Generation
LCD Voltage Regulator
Pull-ups
Open-Drain Output Option
Oscillator Options
Programming Entry
Code Protection
Configuration Words
Start-up Time from Sleep
Power-up Timer
Data EEPROM
BOR
LVD
A/D Channels
A/D Calibration
In-Circuit Emulation
Characteristic
NOTABLE DIFFERENCES BETWEEN PIC18F8490 AND PIC18F85J90 FAMILIES
MIGRATION
BETWEEN HIGH-END
DEVICE FAMILIES
2.0V-3.6V, Dual Voltage Requirement
Implemented; Includes Voltage Boost
Available on USARTs, SPI and CCP
Simple BOR with Voltage Regulator
43.8 s/byte (2.8 ms/64-byte block)
1,000 Write/Erase Cycles (typical)
Limited Primary Options (EC, HS,
Integrated with Voltage Regulator
PLL); Flexible Internal Oscillator
Low Voltage, Key Sequence
Single Block, All or Nothing
Voltage Regulator Disabled
PORTB and PORTC Only
PORTB, PORTD, PORTE
Stored in Last 4 Words of
5.5V on Digital Only Pins
Program Memory space
Self-Calibration Feature
Use Self-Programming
(INTOSC and INTRC)
PIC18F85J90 Family
20 Years (minimum)
10 s (typical) with
40 MHz @ 2.35V
200 s (typical)
Not available
and PORTJ
Output Pins
Always on
32 Kbytes
4 Modes
Low
192
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ences which should be considered when migrating an
application across device families to achieve a new
design goal. These are summarized in Table B-1. The
areas of difference, which could be a major impact on
migration, are discussed in greater detail later in this
section.
100,000 Write/Erase Cycles (typical)
More Primary Options (EC, HS, XT,
15.6 s/byte (1 ms/64-byte block)
Separate Programmable Module
Oscillator (INTOSC and INTRC)
Multiple Code Protection Blocks
Stored in Configuration Space,
LP, RC, PLL); Flexible Internal
Separate Programmable BOR
Software Look-up Table
 2010 Microchip Technology Inc.
PIC18F8490 Family
40 Years (minimum)
Starting at 300000h
V
40 MHz @ 4.2V
DD
10 s (typical)
Not Available
Not Available
Not Available
V
Configurable
2.0V-5.5V
16 Kbytes
PP
on All I/O Pins
Available
All Ports
PORTB
1 Mode
Lower
and LVP
192
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