PIC18F64J90-I/PT Microchip Technology, PIC18F64J90-I/PT Datasheet - Page 20

Microcontroller

PIC18F64J90-I/PT

Manufacturer Part Number
PIC18F64J90-I/PT
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F64J90-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F64J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F85J90 FAMILY
TABLE 1-3:
DS39770C-page 20
RG0/LCDBIAS0
RG1/TX2/CK2
RG2/RX2/DT2/V
RG3/V
RG4/SEG26
V
V
AV
AV
ENVREG
V
Legend: TTL = TTL compatible input
Note 1:
SS
DD
DDCORE
SS
DD
RG0
LCDBIAS0
RG1
TX2
CK2
RG2
RX2
DT2
V
RG3
V
RG4
SEG26
V
V
LCAP
LCAP
DDCORE
CAP
2:
LCAP
Pin Name
/V
1
2
ST
I
P
I
Default assignment for CCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for CCP2 when the CCP2MX Configuration bit is cleared.
2
CAP
2
C™ = I
LCAP
= Schmitt Trigger input with CMOS levels
= Input
= Power
PIC18F6XJ90 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C/SMBus
1
Pin Number
9, 25, 41, 56
26, 38, 57
TQFP
20
19
18
10
3
4
5
6
8
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
P
P
P
P
P
P
I
I
I
I
I
Analog
Analog
Analog
Analog
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTG is a bidirectional I/O port.
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Enable for on-chip voltage regulator.
Core logic power or external filter capacitor connection.
Digital I/O.
BIAS0 input for LCD.
Digital I/O.
AUSART asynchronous transmit.
AUSART synchronous clock (see related RX2/DT2).
Digital I/O.
AUSART asynchronous receive.
AUSART synchronous data (see related TX2/CK2).
LCD charge pump capacitor input.
Digital I/O.
LCD charge pump capacitor input.
Digital I/O.
SEG26 output for LCD.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
 2010 Microchip Technology Inc.
DD
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