PIC18F448-I/L Microchip Technology, PIC18F448-I/L Datasheet - Page 194

• Manufacturer Part Number: PIC18F448-I/L
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,44PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F448-I/L

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136, DM163011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: AC164309 - MODULE SKT FOR PM3 44PLCC444-1001 - DEMO BOARD FOR PICMICRO MCUDVA16XL441 - ADAPTER DEVICE ICE 44PLCCDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F448I/L

FIGURE 18-5:
TABLE 18-7:
DS41159E-page 192
PIC18FXX8
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
SPBRG
Legend:
Note 1:
Rcv Buffer Reg
(Interrupt Flag)
Name
Note: This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word,
Buffer Reg
Read Rcv
OERR bit
Rcv Shift
RX (pin)
RCREG
CREN
causing the OERR (overrun) bit to be set.
RCIF
Reg
x = unknown, - = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous reception.
These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as ‘0’s.
USART Receive Register
Baud Rate Generator Register
GIE/GIEH
PSPIE
PSPIP
PSPIF
SPEN
CSRC
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
(1)
(1)
(1)
ASYNCHRONOUS RECEPTION
Start
PEIE/GIEL TMR0IE
bit
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit 0
bit 1
SREN
TXEN
RCIF
RCIE
RCIP
Bit 5
INT0IE
CREN
SYNC
Bit 4
TXIF
TXIE
TXIP
bit 7/8
Stop
bit
ADDEN
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
Word 1
RCREG
—
Start
bit
TMR0IF
CCP1IF
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
bit 0
BRGH
FERR
Bit 2
TMR2IF TMR1IF
INT0IF
OERR
TRMT
Bit 1
bit 7/8
Word 2
RCREG
Stop
RX9D
TX9D
bit
RBIF
Bit 0
© 2006 Microchip Technology Inc.
Start
bit
0000 000x
0000 0000
0000 0000
1111 1111
0000 000x
0000 0000
0000 -010
0000 0000
POR, BOR
Value on
bit 7/8
0000 000u
0000 0000
0000 0000
1111 1111
0000 000u
0000 0000
0000 -010
0000 0000
Stop
Value on
all other
bit
Resets