PIC16F72-E/SP Microchip Technology, PIC16F72-E/SP Datasheet - Page 52

• Manufacturer Part Number: PIC16F72-E/SP
• Description: 28 PIN, 3.5KB STD FLASH, 128 RAM, 22 I/O,
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F72-E/SP

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: I2C, SPI, SSP
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC16F72
FIGURE 9-6:
FIGURE 9-7:
DS39597C-page 50
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
SDA
SCL
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
SSPOV (SSPCON<6>)
S
S
A7 A6 A5 A4 A3 A2 A1
1
Receiving Address
A7
2
1
Data is
sampled
3
A6
2
I
I
4
2
2
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
A5
Receiving Address
3
5
A4
4
6
R/W = 0
7
A3
5
8
A2
6
ACK
9
A1
7
D7
1
D6
R/W = 1
2
8
SSPBUF register is read
Receiving Data
D5
3
Cleared in software
9
ACK
D4
Bit SSPOV is set because the SSPBUF register is still full.
responds to SSPIF
4
while CPU
SCL held low
D3
5
D2
6
D1
7
D7
D0
1
SSPBUF is written in software
8
ACK
D6
9
2
Cleared in software
Set bit after writing to SSPBUF
(the SSPBUF must be written to
before the CKP bit can be set)
D7
1
D5
3
D6
2
D4
4
D5
Receiving Data
3
Transmitting Data
D3
D4
4
5
© 2007 Microchip Technology Inc.
ACK is not sent.
D3
D2
5
6
D2
6
From SSP Interrupt
Service Routine
D1
7
D1
7
D0
8
D0
8
ACK
ACK
9
9
Bus Master
transfer
terminates
P
P