PIC16C926-I/PT Microchip Technology, PIC16C926-I/PT Datasheet - Page 78

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC16C926-I/PT

Manufacturer Part Number
PIC16C926-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C926-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C926I/PT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16C925/926
REGISTER 10-2:
The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared
and the A/D interrupt flag bit ADIF is set. The block dia-
gram of the A/D module is shown in Figure 10-1.
DS39544A-page 76
bit 7
bit 6-4
bit 3-0
ADCON1 REGISTER (ADDRESS 9Fh)
bit 7
ADFM: A/D Result Format Select bit
1 = Right justified. 6 Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ‘0’.
Unimplemented: Read as '0'
PCFG<3:0>: A/D Port Configuration Control bits:
A = Analog input
Note 1: This column indicates the number of analog channels available as A/D inputs and
Legend:
R = Readable bit
- n = Value at POR
PCFG<3:0>
ADFM
U-0
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
the number of analog channels used as voltage reference inputs.
U-0
AN4
RA5
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
D = Digital I/O
V
V
V
V
V
V
V
V
V
AN3
RA3
R/W-0
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
Preliminary
W = Writable bit
’1’ = Bit is set
+
+
+
+
+
+
+
+
+
V
V
V
V
V
AN2
RA2
REF
REF
REF
REF
REF
D
D
D
D
A
A
A
A
A
A
-
-
-
-
-
U-0
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
To determine sample time, see Section 10.1. After this
acquisition time has elapsed, the A/D conversion can
be started.
AN1
RA1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
PCFG3
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
AN0
RA0
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
V
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
RA3
V
V
V
V
V
V
REF
PCFG2
DD
DD
DD
DD
DD
DD
R/W-0
+
2001 Microchip Technology Inc.
V
RA2
RA2
RA2
RA2
RA2
V
V
V
V
V
V
V
V
V
V
REF
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
x = Bit is unknown
-
PCFG1
R/W-0
Refs
C
5/0
4/1
5/0
4/1
3/0
2/1
0/0
3/2
5/0
4/1
3/2
3/2
2/2
1/0
1/2
HAN
(1)
/
PCFG0
R/W-0
bit 0

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