PIC16C926-I/PT Microchip Technology, PIC16C926-I/PT Datasheet - Page 14

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC

PIC16C926-I/PT

Manufacturer Part Number
PIC16C926-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C926-I/PT

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA16PQ640 - ADAPTER DEVICE FOR MPLAB-ICEAC164023 - MODULE SKT PROMATEII 68TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C926I/PT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16C925/926
2.2
The data memory is partitioned into four banks which
contain the General Purpose Registers and the Special
Function Registers. Bits RP1 and RP0 are the bank
select bits.
The lower locations of each Bank are reserved for the
Special Function Registers. Above the Special Func-
tion Registers are General Purpose Registers imple-
mented as static RAM. All four banks contain special
function registers. Some “high use” special function
registers are mirrored in other banks for code reduction
and quicker access.
DS39544A-page 12
(STATUS<6:5>)
RP1:RP0
Data Memory Organization
11
10
01
00
3 (180h-1FFh)
2 (100h-17Fh)
1 (80h-FFh)
0 (00h-7Fh)
Bank
Preliminary
2.2.1
The register file can be accessed either directly, or indi-
rectly
(Section 2.6).
The following General Purpose Registers are not phys-
ically implemented:
• F0h-FFh of Bank 1
• 170h-17Fh of Bank 2
• 1F0h-1FFh of Bank 3
These locations are used for common access across
banks.
through
GENERAL PURPOSE REGISTER
FILE
the
File
2001 Microchip Technology Inc.
Select
Register
FSR

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