EP9307-IR Cirrus Logic Inc, EP9307-IR Datasheet - Page 467

IC Universal Platform ARM9 SOC Prcessor

EP9307-IR

Manufacturer Part Number
EP9307-IR
Description
IC Universal Platform ARM9 SOC Prcessor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9307-IR

Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
272-TFBGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1255

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP9307-IR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
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EP9307-IRZ
Manufacturer:
CIRRUS
Quantity:
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Cirrus Logic Inc
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HcLSThreshold
DS785UM1
31
15
Default:
Definition:
Bit Description:
Address:
Default:
Definition:
Bit Description:
30
14
RSVD
29
13
28
12
0x8002_0040
0x0000_0000
Defines the earliest time the host controller should start processing the
periodic list.
RSVD:
PS:
0x8002_0044
0x0000_0628
Contains a value used by the host controller to determine whether to commit
to the transfer of a maximum 8-byte LS packet before EOF.
RSVD:
LST:
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
PeriodicStart. After a hardware reset, this field is cleared.
This is then set by HCD during the HC initialization. The
value is calculated roughly as 10% off from HcFmInterval.
A typical value will be 0x03E67. When HcFmRemaining
reaches the value specified, processing of the periodic
lists will have priority over Control/Bulk processing. HC will
therefore start processing the Interrupt list after completing
the current Control or Bulk transaction that is in progress.
Reserved. Unknown During Read.
LSThreshold. This field contains a value which is
compared to the FrameRemaining field prior to initiating a
Low Speed transaction. The transaction is started only if
FrameRemaining >= this field. The value is calculated by
HCD with the consideration of transmission and setup
overhead.
24
8
RSVD
23
7
22
6
LST
21
5
Universal Serial Bus Host Controller
20
4
19
3
EP93xx User’s Guide
18
2
17
1
11-27
16
0
11

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