EP9307-IR Cirrus Logic Inc, EP9307-IR Datasheet - Page 114
![IC Universal Platform ARM9 SOC Prcessor](/photos/12/32/123267/ep9307-irz_sml.jpg)
EP9307-IR
Manufacturer Part Number
EP9307-IR
Description
IC Universal Platform ARM9 SOC Prcessor
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9307-IR
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
272-TFBGA
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No
Other names
598-1255
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9307-IRZ
Manufacturer:
CIRRUS
Quantity:
3 468
Company:
Part Number:
EP9307-IRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
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3
3-44
MaverickCrunch Co-Processor
EP93xx User’s Guide
31:28
31:28
31:28
cond
cond
cond
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
Bit Definitions:
Description:
Mnemonic:
1 1 1 0
1 1 1 0
1 1 1 0
27:24
27:24
27:24
32-bit Integer Multiply
64-bit Integer Multiply
32-bit Integer Multiply-Add
CRd:
CRn:
CRm:
Multiplies two 32-bit integers.
CFMUL32<cond> CRd, CRn, CRm
CRd:
CRn:
CRm:
Multiplies two 64-bit integers.
CFMUL64<cond> CRd, CRn, CRm
CRd:
CRn:
CRm:
Multiplies two 32-bit integers and adds the result to another 32-bit integer:
CFMAC32<cond> CRd, CRn, CRm
CRd = CRd + (CRn
23:22
23:22
23:22
0 0
0 0
0 0
21:20
21:20
21:20
0 1
0 1
0 1
Copyright 2007 Cirrus Logic
Destination register
Minuend register
Subtrahend register
Destination register
Multiplicand register
Multiplicand register
Destination register
Multiplicand register
Multiplicand register
×
19:16
19:16
19:16
CRn
CRn
CRn
CRm)
15:12
15:12
15:12
CRd
CRd
CRd
0 1 0 1
0 1 0 1
0 1 0 1
11:8
11:8
11:8
0 0 0
0 0 1
0 1 0
7:5
7:5
7:5
4
4
4
0
0
0
DS785UM1
CRm
CRm
CRm
3:0
3:0
3:0
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