DSPIC30F4011-20E/ML Microchip Technology, DSPIC30F4011-20E/ML Datasheet - Page 227
DSPIC30F4011-20E/ML
Manufacturer Part Number
DSPIC30F4011-20E/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
Specifications of DSPIC30F4011-20E/ML
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401120EML
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APPENDIX A:
Revision D (August 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were
distributed with incomplete characterization data.
This revision reflects these changes:
• Revised I
• Updated
• Base Instruction CP1 removed from instruction
• Revised Electrical Characteristics:
Revision E (January 2007)
© 2010 Microchip Technology Inc.
(see
Analog-to-Digital Converter (ADC) Module”
more fully describe configuration guidelines
set (see
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- I/O Pin Input Specifications
- BOR Voltage Limits
- Watchdog Timer Time-out Limits
- This revision includes updates to the
(seeTable
(see
(see
(see
(see
(see
packaging diagrams.
Table
Table
Table
Table
Table
Table
Table
2
Section 20.0 “10-bit, High-Speed
C Slave Addresses
17-1)
24-5)
24-6)
24-7)
24-8)
24-11)
24-21)
22-2)
IDLE
) Specifications
REVISION HISTORY
DD
) Specifications
PD
) Specifications
to
Revision F (March 2008)
This revision reflects these updates:
• Added Note 1 to 32-bit Timer4/5 Block Diagram
• Changed the location of the input reference in the
• Added FUSE Configuration Register (FICD)
• Removed erroneous statement regarding genera-
• Electrical Specifications:
• Corrected erroneous device number (see
• Additional minor corrections throughout the
(see
Diagram (see
10-bit High-Speed ADC Functional Block Diagram
(see
details (see
Registers”
tion of CAN receive errors (see
“Receive
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention Volt-
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
“Product Identification
document
dsPIC30F4011/4012
DO16, DO20, and DO26 (see
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table
age) has been updated to include a Min value
(see
has been updated to include Min and Max
values and the Typ value has been removed
(see
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table
has been expanded to reflect multiple Min
and Max values for different temperatures
(see
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see
Figure
Figure
Table
Table
Table
24-40)
24-18)
24-17)
Errors”)
Section 21.6 “Device Configuration
11-1) and 16-bit Timer4/5 Block
20-1)
and
24-4)
24-11)
24-17)
Figure
Table
Table
11-2)
21-8)
24-20)
System”)
PDU
timing parame-
Section 19.4.5
Table
DS70135G-page 227
24-9)
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