DSPIC30F4011-20E/ML Microchip Technology, DSPIC30F4011-20E/ML Datasheet - Page 166
DSPIC30F4011-20E/ML
Manufacturer Part Number
DSPIC30F4011-20E/ML
Description
IC,DSP,16-BIT,CMOS,LLCC,44PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
Specifications of DSPIC30F4011-20E/ML
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
DSPIC30F401120EML
- DSPIC30F4012-30ISO PDF datasheet
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- DSPIC30F4012-30ISO PDF datasheet #5
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dsPIC30F4011/4012
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all table
reads and writes and RETURN/RETFIE instructions,
which are single-word instructions but take two or three
cycles. Certain instructions that involve skipping over
the subsequent instruction, require either two or three
cycles if the skip is performed, depending on whether
the instruction being skipped is a single-word or two-
word instruction. Moreover, double-word moves
require two cycles. The double-word instructions
execute in two instruction cycles.
TABLE 22-1:
DS70135G-page 166
#text
(text)
[text]
{
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
Note:
}
For more details on the instruction set,
refer to the “16-bit MCU and DSC
Reference Manual” (DS70157).
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
Means literal defined by “text“
Means “content of text“
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double-Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator Write-Back Destination Address register ∈ {W13, [W13]+=2}
4-bit bit selection field (used in word addressed instructions) ∈ {0...15}
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Zero
Absolute address, label or expression (resolved by the linker)
File register address ∈ {0x0000...0x1FFF}
1-bit unsigned literal ∈ {0,1}
4-bit unsigned literal ∈ {0...15}
5-bit unsigned literal ∈ {0...31}
8-bit unsigned literal ∈ {0...255}
10-bit unsigned literal ∈ {0...255} for Byte mode, {0:1023} for Word mode
14-bit unsigned literal ∈ {0...16384}
16-bit unsigned literal ∈ {0...65535}
23-bit unsigned literal ∈ {0...8388608}; LSB must be 0
Field does not require an entry, may be blank
DSP Status bits: ACCA Overflow, ACCB Overflow, ACCA Saturate, ACCB Saturate
Program Counter
10-bit signed literal ∈ {-512...511}
16-bit signed literal ∈ {-32768...32767}
6-bit signed literal ∈ {-16...16}
Description
© 2010 Microchip Technology Inc.
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