DSPIC30F3010-20E/SP Microchip Technology, DSPIC30F3010-20E/SP Datasheet - Page 222
![IC,DSP,16-BIT,CMOS,DIP,28PIN,PLASTIC](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC30F3010-20E/SP
Manufacturer Part Number
DSPIC30F3010-20E/SP
Description
IC,DSP,16-BIT,CMOS,DIP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F3010-30ISO.pdf
(228 pages)
4.DSPIC30F3010-30ISO.pdf
(18 pages)
5.DSPIC30F3010-30ISO.pdf
(6 pages)
6.DSPIC30F3010-30ISO.pdf
(16 pages)
7.DSPIC30F3010-30ISO.pdf
(22 pages)
Specifications of DSPIC30F3010-20E/SP
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
dsPIC30F3010/3011
PWM Operation During CPU Idle Mode............................ 101
PWM Operation During CPU Sleep Mode ........................ 101
PWM Output and Polarity Control ..................................... 100
PWM Output Override......................................................... 99
PWM Period ........................................................................ 96
PWM Special Event Trigger .............................................. 101
PWM Time Base ................................................................. 95
PWM Update Lockout ....................................................... 101
Q
QEA/QEB Input Characteristics ........................................ 186
QEI Module
Quadrature Decoder Timing Requirements ...................... 186
Quadrature Encoder Interface (QEI) Module ...................... 87
Quadrature Encoder Interface Interrupts ............................ 90
Quadrature Encoder Interface Logic ................................... 88
R
Reader Response ............................................................. 220
Reset......................................................................... 135, 141
Reset Sequence.................................................................. 45
Reset Timing Characteristics ............................................ 178
Reset Timing Requirements.............................................. 178
Resets
Revision History ................................................................ 211
S
Simple Capture Event Mode
Simple OCx/PWM Mode Timing Requirements ................ 184
Simple Output Compare Match Mode................................. 84
Simple PWM Mode ............................................................. 84
Single Pulse PWM Operation.............................................. 99
Software Simulator (MPLAB SIM)..................................... 161
Software Stack Pointer, Frame Pointer............................... 18
SPI Mode
DS70141F-page 222
Output Pin Control .................................................... 100
Complementary Output Mode ..................................... 99
Synchronization .......................................................... 99
Postscaler ................................................................. 101
Continuous Up/Down Count Modes............................ 95
Double-Update Mode .................................................. 96
Free-Running Mode .................................................... 95
Postscaler ................................................................... 96
Prescaler ..................................................................... 96
Single-Shot Mode ....................................................... 95
External Clock Timing Requirements........................ 182
Index Pulse Timing Characteristics........................... 187
Index Pulse Timing Requirements ............................ 187
Operation During CPU Idle Mode ............................... 90
Operation During CPU Sleep Mode ............................ 89
Register Map............................................................... 91
Timer Operation During CPU Idle Mode ..................... 90
Timer Operation During CPU Sleep Mode.................. 89
Reset Sources ............................................................ 45
BOR, Programmable................................................. 143
POR .......................................................................... 141
POR with Long Crystal Start-up Time ....................... 143
POR, Operating without FSCM and PWRT .............. 143
Capture Buffer Operation............................................ 80
Capture Prescaler ....................................................... 80
Hall Sensor Mode ....................................................... 80
Input Capture in CPU Idle Mode ................................. 81
Timer2 and Timer3 Selection Mode ............................ 80
Input Pin Fault Protection............................................ 84
Period.......................................................................... 85
CALL Stack Frame...................................................... 33
SPI Module ....................................................................... 103
SPI Operation During CPU Idle Mode .............................. 105
SPI Operation During CPU Sleep Mode........................... 105
STATUS Register ............................................................... 18
System Integration............................................................ 135
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 65
Timer2 and Timer3 Selection Mode.................................... 84
Timer2/3 Module................................................................. 69
Timer4/5 Module................................................................. 75
TimerQ (QEI Module) External Clock
Timing Characteristics
Timing Diagrams
Slave Select Synchronization ................................... 105
SPI1 Register Map.................................................... 106
Framed SPI Support ................................................. 104
Operating Function Description ................................ 103
SDOx Disable ........................................................... 103
Timing Characteristics
Timing Requirements
Word and Byte Communication ................................ 103
Overview................................................................... 135
Register Map ............................................................ 148
AC............................................................................. 172
DC ............................................................................ 164
16-Bit Asynchronous Counter Mode........................... 65
16-Bit Synchronous Counter Mode............................. 65
16-Bit Timer Mode ...................................................... 65
Gate Operation ........................................................... 66
Interrupt ...................................................................... 67
Operation During Sleep Mode .................................... 66
Prescaler .................................................................... 66
Real-Time Clock ......................................................... 67
Register Map .............................................................. 68
32-Bit Synchronous Counter Mode............................. 69
32-Bit Timer Mode ...................................................... 69
ADC Event Trigger...................................................... 72
Gate Operation ........................................................... 72
Interrupt ...................................................................... 72
Operation During Sleep Mode .................................... 72
Register Map .............................................................. 73
Timer Prescaler .......................................................... 72
Register Map .............................................................. 78
Timing Characteristics .............................................. 182
SPI Module
A/D Conversion
ADC Conversion
Band Gap Start-up Time........................................... 179
Center Aligned PWM .................................................. 97
CLKOUT and I/O ...................................................... 177
Master Mode (CKE = 0).................................... 188
Master Mode (CKE = 1).................................... 189
Slave Mode (CKE = 1).............................. 190, 191
Master Mode (CKE = 0).................................... 188
Master Mode (CKE = 1).................................... 189
Slave Mode (CKE = 0)...................................... 190
Slave Mode (CKE = 1)...................................... 192
RTC Interrupts .................................................... 67
RTC Oscillator Operation ................................... 67
Slave Mode (CKE = 0)...................................... 190
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
10-Bit High-speed (CHPS = 01, SIMSAM = 0,
ASAM = 1, SSRC = 111, SAMC = 00001) 200
ASAM = 0, SSRC = 000) .......................... 199
© 2010 Microchip Technology Inc.