DSPIC30F3010-20E/SO Microchip Technology, DSPIC30F3010-20E/SO Datasheet - Page 41
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DSPIC30F3010-20E/SO
Manufacturer Part Number
DSPIC30F3010-20E/SO
Description
IC,DSP,16-BIT,CMOS,SOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F3010-30ISO.pdf
(228 pages)
4.DSPIC30F3010-30ISO.pdf
(18 pages)
5.DSPIC30F3010-30ISO.pdf
(6 pages)
6.DSPIC30F3010-30ISO.pdf
(16 pages)
7.DSPIC30F3010-30ISO.pdf
(22 pages)
Specifications of DSPIC30F3010-20E/SO
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F3010-20E/SO
Manufacturer:
MICROCHIP
Quantity:
1 340
Company:
Part Number:
DSPIC30F3010-20E/SO
Manufacturer:
MICROCHIP
Quantity:
1 000
TABLE 11-5:
© 2010 Microchip Technology Inc.
Step 6: Update the row address stored in NVMADRU:NVMADR. When W6 rolls over to 0x0, NVMADRU must be
0000
0000
0000
0000
Step 7: Reset device internal PC.
0000
0000
Step 8: Repeat Steps 3-7 until all rows of code memory are erased.
Step 9: Initialize NVMADR and NVMADRU to erase executive memory and initialize W7 for row address updates.
0000
0000
0000
0000
0000
Step 10: Set NVMCON to erase 1 row of executive memory.
0000
0000
Step 11: Unlock the NVMCON to erase 1 row of executive memory.
0000
0000
0000
0000
Step 12: Initiate the erase cycle.
0000
0000
0000
—
0000
0000
0000
0000
0000
Step 13: Update the row address stored in NVMADR.
0000
0000
Step 14: Reset device internal PC.
0000
0000
Step 15: Repeat Steps 10-14 until all 24 rows of executive memory are erased.
Step 16: Initialize NVMADR and NVMADRU to erase data memory and initialize W7 for row address updates.
0000
0000
0000
0000
0000
Step 17: Set NVMCON to erase 1 row of data memory.
0000
0000
Command
(Binary)
incremented.
430307
AF0042
EC2764
883B16
040100
000000
EB0300
883B16
200807
883B27
200407
24071A
883B0A
200558
883B38
200AA9
883B39
A8E761
000000
000000
—
000000
000000
A9E761
000000
000000
430307
883B16
040100
000000
2XXXX6
883B16
2007F6
883B16
200207
24075A
883B0A
(Hexadecimal)
SERIAL INSTRUCTION EXECUTION FOR ERASING PROGRAM MEMORY
(EITHER IN LOW-VOLTAGE OR NORMAL-VOLTAGE SYSTEMS) (CONTINUED)
Data
ADD
BTSC
INC
MOV
GOTO 0x100
NOP
CLR
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
BSET NVMCON, #WR
NOP
NOP
Externally time ‘P13a’ ms (see
Timing
NOP
NOP
BCLR NVMCON, #WR
NOP
NOP
ADD
MOV
GOTO 0x100
NOP
MOV
MOV
MOV
MOV
MOV
MOV
MOV
Requirements”)
W6, W7, W6
SR, #C
NVMADRU
W6, NVMADR
W6
W6, NVMADR
#0x80, W7
W7, NVMADRU
#0x40, W7
#0x4071, W10
W10, NVMCON
#0x55, W8
W8, NVMKEY
#0xAA, W9
W9, NVMKEY
W6, W7, W6
W6, NVMADR
#<lower 16-bits of starting Data EEPROM address>, W6
W6, NVMADR
#0x7F, W6
W6, NVMADRU
#0x20, W7
#0x4075, W10
W10, NVMCON
Description
Section 13.0 “AC/DC Characteristics and
DS70102K-page 41