DSPIC30F2011T-20E/SO Microchip Technology, DSPIC30F2011T-20E/SO Datasheet - Page 14
![IC,DSP,16-BIT,CMOS,SOP,18PIN,PLASTIC](/photos/6/76/67656/150-18-soic_sml.jpg)
DSPIC30F2011T-20E/SO
Manufacturer Part Number
DSPIC30F2011T-20E/SO
Description
IC,DSP,16-BIT,CMOS,SOP,18PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
Specifications of DSPIC30F2011T-20E/SO
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- DSPIC30F2011-20ISO PDF datasheet
- DSPIC30F2011-20ISO PDF datasheet #2
- DSPIC30F2011-20ISO PDF datasheet #3
- DSPIC30F2011-20ISO PDF datasheet #4
- DSPIC30F2011-20ISO PDF datasheet #5
- DSPIC30F2011-20IP PDF datasheet #6
- Current page: 14 of 210
- Download datasheet (3Mb)
dsPIC30F2011/2012/3012/3013
FIGURE 1-3:
DS70139G-page 14
Program Memory
Controller
Address Latch
Data EEPROM
Interrupt
Data Latch
(24 Kbytes)
OSC1/CLKI
(1 Kbytes)
24
Generation
Timing
Instruction
Decode &
Control
AV
16
V
MCLR
DD
DD
24
24
dsPIC30F3012 BLOCK DIAGRAM
, V
, AV
Control Block
Data Access
PSV & Table
24
12-bit ADC
SS
SS
16
Control
Start-up Timer
Stack
Logic
Low-Voltage
PCU
Program Counter
POR/BOR
Watchdog
Power-up
Oscillator
Detect
Y Data Bus
Reset
Timer
Timer
8
ROM Latch
PCH
Capture
Module
Timers
IR
Input
Control
Logic
Loop
16
PCL
Decode
16
Engine
16
DSP
Compare
Module
Output
SPI1
Data Latch
(1 Kbytes)
Y AGU
Address
Y Data
Effective Address
Latch
RAM
16
16
16
W Reg Array
16
16 x 16
ALU<16>
16
16
16
X RAGU
X WAGU
X Data Bus
16
Data Latch
(1 Kbytes)
Divide
UART1
Address
Unit
X Data
I
Latch
2
RAM
C™
16
16
16
16
PORTC
PORTB
PORTD
EMUC2/OC1/IC1/INT1/RD0
EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13
EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14
OSC2/CLKO/RC15
EMUD3/AN0/V
EMUC3/AN1/V
AN2/SS1/LVDIN/CN4/RB2
AN3/CN5/RB3
PGD/EMUD/AN4/U1TX/SDO1/SCL/CN6/RB4
PGC/EMUC/AN5/U1RX/SDI1/SDA/CN7/RB5
AN6/SCK1/INT0/OCFA/RB6
EMUD2/AN7/OC2/IC2/INT2/RB7
© 2010 Microchip Technology Inc.
REF
REF
+/CN2/RB0
-/CN3/RB1
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