P87LPC761BN NXP Semiconductors, P87LPC761BN Datasheet - Page 22

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P87LPC761BN

Manufacturer Part Number
P87LPC761BN
Description
IC, MCU 8BIT 80C51 2K OTP, DIP16
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87LPC761BN

Controller Family/series
(8051) 8052
Core Size
8bit
No. Of I/o's
14
Program Memory Size
2KB
Ram Memory Size
128Byte
Cpu Speed
20MHz
Oscillator Type
External, Internal
No. Of Timers
2
Digital
RoHS Compliant
Package
16PDIP
Device Core
80C51
Family Name
87LP
Maximum Speed
20 MHz
Ram Size
128 Byte
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
14
Interface Type
I2C/UART
Operating Temperature
0 to 70 °C
Number Of Timers
2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87LPC761BN
Manufacturer:
TI
Quantity:
6
Philips Semiconductors
Open Drain Output
The open drain output configuration turns off all pull-ups and only
drives the pull-down transistor of the port driver when the port latch
contains a logic 0. To be used as a logic output, a port configured in
this manner must have an external pull-up, typically a resistor tied to
V
quasi-bidirectional mode.
The open drain port configuration is shown in Figure 11.
Push-Pull Output
The push-pull output configuration has the same pull-down structure
as both the open drain and the quasi-bidirectional output modes, but
provides a continuous strong pull-up when the port latch contains a
logic 1. The push-pull mode may be used when more source current
is needed from a port output.
The push-pull port configuration is shown in Figure 12.
The three port pins that cannot be configured are P1.2, P1.3, and
P1.5. The port pins P1.2 and P1.3 are permanently configured as
open drain outputs. They may be used as inputs by writing ones to
their respective port latches. P1.5 may be used as a Schmitt trigger
input if the P87LPC761 has been configured for an internal reset
and is not using the external reset input function RST.
Additionally, port pins P2.0 and P2.1 are disabled for both input and
output if one of the crystal oscillator options is chosen. Those
options are described in the Oscillator section.
2002 Mar 07
DD
Low power, low price, low pin count (16 pin)
microcontroller with 2 kbyte OTP
. The pull-down for this mode is the same as for the
Configuration
Configuration
PORT LATCH
DATA
PORT LATCH
DATA
INPUT
DATA
Figure 11. Open Drain Output
Figure 12. Push-Pull Output
N
INPUT
DATA
19
The value of port pins at reset is determined by the PRHI bit in the
UCFG1 register. Ports may be configured to reset high or low as
needed for the application. When port pins are driven high at reset,
they are in quasi-bidirectional mode and therefore do not source
large amounts of current.
Every output on the P87LPC761 may potentially be used as a 20
mA sink LED drive output. However, there is a maximum total output
current for all ports which must not be exceeded.
All ports pins of the P87LPC761 have slew rate controlled outputs.
This is to limit noise generated by quickly switching output signals.
The slew rate is factory set to approximately 10 ns rise and fall times.
The bits in the P2M1 register that are not used to control
configuration of P2.1 and P2.0 are used for other purposes. These
bits can enable Schmitt trigger inputs on each I/O port, enable the
toggle output from Timer 0, and enable a clock output if either the
internal RC oscillator or external clock input is being used. The last
two functions are described in the Timer/Counters and Oscillator
sections respectively. The enable bits for all of these functions are
shown in Figure 13.
Each I/O port of the P87LPC761 may be selected to use TTL level
inputs or Schmitt inputs with hysteresis. A single configuration bit
determines this selection for the entire port. Port pins P1.2, P1.3,
and P1.5 always have a Schmitt trigger input.
N
P
V
DD
SU01161
PORT
PIN
SU01160
PORT
PIN
P87LPC761
Preliminary data

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