AD8592ARMZ Analog Devices Inc, AD8592ARMZ Datasheet - Page 11

• Manufacturer Part Number: AD8592ARMZ
• Description: OP AMP, +SHUTDOWN RRI/O, SMD, 8592
• Manufacturer: Analog Devices Inc

Specifications of AD8592ARMZ

• Op Amp Type: Low Input Bias
• No. Of Amplifiers: 2
• Bandwidth: 2.2MHz
• Slew Rate: 5V/µs
• Supply Voltage Range: 2.5V To 6V
• Amplifier Case Style: MSOP
• No. Of Pins: 10
• Operating Temperature Range: -40°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The U1-A amplifier is configured as a unity gain buffer driving a
1 nF capacitor. The input signal is connected to the noninverting
input, while the sample clock controls the shutdown for that
amplifier. When the sample clock is high, the U1-A amplifier is
active and the output follows V
low, U1-A shuts down with the output of the amplifier going to
a high impedance state, holding the voltage on the C1 capacitor.
The U1-B amplifier is used as a unity gain buffer to prevent load-
ing on C1. Because of the low input bias current of the U1-B
CMOS input stage and the high impedance state of the U1-A
output in shutdown, there is very little voltage droop from C1
during the Hold period. This circuit can be used with sample
frequencies as high as 500 kHz and as low as below 1 Hz. Even
lower voltage droop can be achieved for very low sample rates
by increasing the value of C1.
Direct Access Arrangement for PCMCIA Modems
(Telephone Line Interface)
Figure 38 illustrates a +5 V transmit/receive telephone line
interface for 600
signals on a transformer-coupled 600
manner. Amplifier A1 provides gain that can be adjusted to
meet the modem output drive requirements. Both A1 and A2
are configured to apply the largest possible signal on a single
supply to the transformer. Because of the AD8594’s high output
current drive and low dropout voltages, the largest signal avail-
able on a single +5 V supply is approximately 4.5 V p-p into a
600
difference amplifier for two reasons: (1) It prevents the transmit
signal from interfering with the receive signal and (2) it extracts
the receive signal from the transmission line for amplification by
A4. Amplifier A4’s gain can be adjusted in the same manner as
A1’s to meet the modem’s input signal requirements. Standard
resistor values permit the use of SIP (Single In-line Package)
format resistor arrays. Couple this with the AD8594 16-lead
TSSOP or SOIC footprint, and this circuit offers a compact,
cost effective solution.
Figure 38. A Single Supply Direct Access Arrangement for
PCMCIA Modems
REV. A
TO TELEPHONE
600
Z
A1, A2 = 1/2 AD8592
A3, A4 = 1/2 AD8592
O
LINE
MIDCOM
671-8005
transmission system. Amplifier A3 is configured as a
1:1
T1
6.2V
6.2V
10k
R11
10k
10k
systems. It allows full duplex transmission of
R9
360
R12
R3
2
3
10k
10k
10k
A3
5
R10
ADJUST
R5
R6
Tx GAIN
IN
P1
. Once the sample clock goes
2k
1
1
9
5
A1
A2
10k
6
R13
9.09k
R2
8
7
line in a differential
2
3
14.3k
8
7
R14
10k
A4
R1
6
Rx GAIN
ADJUST
2k
9
0.1 F
P2
C1
10 F
0.1 F
C2
SHUTDOWN
+5V
TRANSMIT
RECEIVE
R7
10k
R8
10k
RxA
TxA
–11–
Single Supply Differential Line Driver
Figure 39 shows a single supply differential line driver circuit that
can drive a 600
to 15 kHz with an input signal of 4 V p-p and a single +5 V supply.
The design uses an AD8594 to mimic the performance of a fully
balanced transformer based solution. However, this design occu-
pies much less board space while maintaining low distortion and
can operate down to dc. Like the transformer based design, either
output can be shorted to ground for unbalanced line driver applica-
tions without changing the circuit gain of 1.
R8 and R9 set up the common-mode output voltage equal to
half of the supply voltage. C1 is used to couple the input signal
and can be omitted if the input’s dc voltage is equal to half of
the supply voltage.
The circuit can also be configured to provide additional gain if
desired. The gain of the circuit is:
Where:
V
IN
SET: R7, R10, R11 = R2
SET: R6, R12, R13 = R3
A1, A2 = 1/2 AD8592
GAIN = R3
Figure 39. A Low Noise, Single Supply Differential
Line Driver
22 F
A
C1
V
R2
2
3
V
V
OUT
V
R2 = R7 = R10 = R11 and,
R3 = R6 = R12 = R13
+5V
A1
IN
OUT
10
4
10k
load with less than 0.7% distortion from 20 Hz
10k
10k
R1
1
R10
= V
R2
AD8591/AD8592/AD8594
R
R
3
2
O1
– V
R7
10k
R11
10k
2
3
8
7
O2
9
A2
A2
10k
R3
7
,
10k
R12
10
4
+5V
10k
R13
9
1
A1
100k
8
7
10k
R6
R9
+5V
R14
50
50
R5
R8
100k
1 F
C2
47 F
47 F
C3
600
C4
R
L
V
V
(7)
O1
O2