GS1559CBE2 GENNUM, GS1559CBE2 Datasheet - Page 57

• Manufacturer Part Number: GS1559CBE2
• Description: IC, DES, 48.5MHZ 20BIT 1.485GBPS BGA-100
• Manufacturer: GENNUM

Specifications of GS1559CBE2

• Supply Voltage Range: 1.71V To 1.89V, 3.13V To 3.47V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: BGA
• No. Of Pins: 100
• Termination Type: SMD
• Control Interface: Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4-14: Host Interface Description for Internal Processing Disable Register
4.10.6.1 Illegal Code Remapping
4.10.6.2 EDH CRC Error Correction
Register Name
IOPROC_DISABLE
Address: 000h
Bit
15-9
8
7-6
5
4
3
2
1
0
Name
–
H_CONFIG
–
ILLEGAL_REMAP
EDH_CRC_INS
ANC_CSUM_INS
CRC_INS
LNUM_INS
TRS_INS
If the ILLEGAL_REMAP bit of the IOPROC_DISABLE register is set LOW, the
GS1559 will remap all codes within the active picture between the values of 3FCh
and 3FFh to 3FBh. All codes within the active picture area between the values of
000h and 003h will be re-mapped to 004h.
In addition, 8-bit TRS and ancillary data preambles will be remapped to 10-bit
values if this feature is enabled.
The GS1559 will generate and insert active picture and full field CRC words into
the EDH data packets received by the device. This feature is only available in SD
mode and is enabled by setting the EDH_CRC_INS bit of the IOPROC_DISABLE
register LOW.
EDH CRC calculation ranges are described in
page
30572 - 7
53.
May 2007
Description
Not Used.
Horizontal sync timing output configuration. Set
LOW for active line blanking timing. Set HIGH for H
blanking based on the H bit setting of the TRS
words. See
Not Used.
Illegal Code re-mapping. Correction of illegal code
words within the active picture. Set HIGH to disable.
The IOPROC_EN/DIS pin must be set HIGH.
Error Detection & Handling (EDH) Cyclical
Redundancy Check (CRC) error correction
insertion. In SD mode set HIGH to disable. The
IOPROC_EN/DIS pin must be set HIGH.
Ancillary Data Check-sum insertion. Set HIGH to
disable. The IOPROC_EN/DIS pin must be set
HIGH.
Y and C line based CRC insertion. In HD mode,
inserts line based CRC words in both the Y and C
channels. Set HIGH to disable. The
IOPROC_EN/DIS pin must be set HIGH.
Y and C line number insertion. In HD mode set
HIGH to disable. The IOPROC_EN/DIS pin must be
set HIGH.
Timing Reference Signal Insertion. Set HIGH to
disable. The IOPROC_EN/DIS pin must be set
HIGH.
Figure
4-2.
EDH CRC Error Detection on
GS1559 Data Sheet
R/W
R/W
R/W
R/W
R/W
R/W
R/W
–
–
Default
57 of 73
–
0
–
0
0
0
0
0
0