PIC16F1826-I/MQ Microchip Technology, PIC16F1826-I/MQ Datasheet - Page 391

• Manufacturer Part Number: PIC16F1826-I/MQ
• Description: IC, 8BIT MCU, PIC16F, 32MHZ, QFN-28
• Manufacturer: Microchip Technology

Specifications of PIC16F1826-I/MQ

• Controller Family/series: PIC16F
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 2kWords
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Extended Instruction Set
F
Fail-Safe Clock Monitor....................................................... 63
Firmware Instructions........................................................ 321
Fixed Voltage Reference (FVR) ........................................ 133
Flash Program Memory .................................................... 103
FSR Register .......... 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38
FVRCON (Fixed Voltage Reference Control) Register ..... 134
I
I
INDF Register ......... 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38
Indirect Addressing ............................................................. 42
Instruction Format ............................................................. 322
Instruction Set ................................................................... 321
© 2009 Microchip Technology Inc.
2
C Mode (MSSPx)
Synchronous Master Mode ............................... 306, 310
Synchronous Slave Mode
ADDFSR ................................................................... 325
Fail-Safe Condition Clearing ....................................... 63
Fail-Safe Detection ..................................................... 63
Fail-Safe Operation..................................................... 63
Reset or Wake-up from Sleep..................................... 63
Associated Registers ................................................ 134
Erasing...................................................................... 110
Writing....................................................................... 110
Acknowledge Sequence Timing................................ 270
Bus Collision
Effects of a Reset...................................................... 271
I
Master Mode
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode .................................................... 271
Read/Write Bit Information (R/W Bit) ........................ 247
Slave Mode
Sleep Operation ........................................................ 271
Stop Condition Timing............................................... 270
ADDLW ..................................................................... 325
ADDWF..................................................................... 325
ADDWFC .................................................................. 325
ANDLW ..................................................................... 325
ANDWF..................................................................... 325
BRA........................................................................... 326
CALL ......................................................................... 327
2
C Clock Rate w/BRG.............................................. 278
Baud Rate Error, Calculating ............................ 297
Baud Rates, Asynchronous Modes .................. 299
Formulas ........................................................... 298
High Baud Rate Select (BRGH Bit) .................. 297
Associated Registers
Reception.......................................................... 308
Transmission .................................................... 306
Associated Registers
Reception.......................................................... 311
Transmission .................................................... 310
During a Repeated Start Condition ................... 275
During a Stop Condition.................................... 276
Operation .......................................................... 262
Reception.......................................................... 268
Start Condition Timing .............................. 264, 265
Transmission .................................................... 266
tion .................................................................... 271
Transmission .................................................... 252
Receive..................................................... 309
Transmit.................................................... 307
Receive..................................................... 311
Transmit.................................................... 310
Preliminary
INTCON Register................................................................ 87
Internal Oscillator Block
Internal Sampling Switch (R
Internet Address ............................................................... 394
Interrupt-On-Change......................................................... 129
Interrupts ............................................................................ 81
INTOSC Specifications ..................................................... 352
IOCBF Register ................................................................ 130
IOCBN Register ................................................................ 130
IOCBP Register ................................................................ 130
CALLW ..................................................................... 327
LSLF ......................................................................... 329
LSRF ........................................................................ 329
MOVF ....................................................................... 329
MOVIW ..................................................................... 330
MOVLB ..................................................................... 330
MOVWI ..................................................................... 331
OPTION.................................................................... 331
Reset ........................................................................ 331
SUBWFB .................................................................. 333
TRIS ......................................................................... 334
BCF .......................................................................... 326
BSF........................................................................... 326
BTFSC...................................................................... 326
BTFSS ...................................................................... 326
CALL......................................................................... 327
CLRF ........................................................................ 327
CLRW ....................................................................... 327
CLRWDT .................................................................. 327
COMF ....................................................................... 327
DECF........................................................................ 327
DECFSZ ................................................................... 328
GOTO ....................................................................... 328
INCF ......................................................................... 328
INCFSZ..................................................................... 328
IORLW ...................................................................... 328
IORWF...................................................................... 328
MOVLW .................................................................... 330
MOVWF.................................................................... 330
NOP.......................................................................... 331
RETFIE..................................................................... 332
RETLW ..................................................................... 332
RETURN................................................................... 332
RLF........................................................................... 332
RRF .......................................................................... 333
SLEEP ...................................................................... 333
SUBLW..................................................................... 333
SUBWF..................................................................... 333
SWAPF..................................................................... 334
XORLW .................................................................... 334
XORWF .................................................................... 334
INTOSC
Associated Registers................................................ 131
ADC .......................................................................... 140
Associated registers w/ Interrupts .............................. 95
Configuration Word w/ Clock Sources........................ 67
Configuration Word w/ PORTA................................. 122
Configuration Word w/ Reference Clock Sources ...... 71
TMR1........................................................................ 179
PIC16F/LF1826/27
Specifications ................................................... 352
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MPEDANCE
DS41391B-page 391
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